| Index: src/compiler/instruction-selector.cc
|
| diff --git a/src/compiler/instruction-selector.cc b/src/compiler/instruction-selector.cc
|
| index 75a8f2f4e04fd672bb1f151f245976dee41139c1..1f218d90c4f58068f74a7d81912d10b7b98df56e 100644
|
| --- a/src/compiler/instruction-selector.cc
|
| +++ b/src/compiler/instruction-selector.cc
|
| @@ -2042,7 +2042,8 @@ void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); }
|
| void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); }
|
| #endif // V8_TARGET_ARCH_64_BIT
|
|
|
| -#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
|
| +#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32 && \
|
| + !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64
|
| void InstructionSelector::VisitInt32x4Splat(Node* node) { UNIMPLEMENTED(); }
|
|
|
| void InstructionSelector::VisitInt32x4ExtractLane(Node* node) {
|
| @@ -2056,7 +2057,8 @@ void InstructionSelector::VisitInt32x4ReplaceLane(Node* node) {
|
| void InstructionSelector::VisitInt32x4Add(Node* node) { UNIMPLEMENTED(); }
|
|
|
| void InstructionSelector::VisitInt32x4Sub(Node* node) { UNIMPLEMENTED(); }
|
| -#endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
|
| +#endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32 &&
|
| + // !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64
|
|
|
| #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
|
| void InstructionSelector::VisitInt32x4Mul(Node* node) { UNIMPLEMENTED(); }
|
| @@ -2084,7 +2086,10 @@ void InstructionSelector::VisitUint32x4ShiftRightByScalar(Node* node) {
|
| void InstructionSelector::VisitUint32x4Max(Node* node) { UNIMPLEMENTED(); }
|
|
|
| void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); }
|
| +#endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
|
|
|
| +#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && \
|
| + !V8_TARGET_ARCH_MIPS64
|
| void InstructionSelector::VisitSimd128Zero(Node* node) { UNIMPLEMENTED(); }
|
|
|
| void InstructionSelector::VisitSimd1x4Zero(Node* node) { UNIMPLEMENTED(); }
|
| @@ -2092,7 +2097,8 @@ void InstructionSelector::VisitSimd1x4Zero(Node* node) { UNIMPLEMENTED(); }
|
| void InstructionSelector::VisitSimd1x8Zero(Node* node) { UNIMPLEMENTED(); }
|
|
|
| void InstructionSelector::VisitSimd1x16Zero(Node* node) { UNIMPLEMENTED(); }
|
| -#endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
|
| +#endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS &&
|
| + // !V8_TARGET_ARCH_MIPS64
|
|
|
| #if !V8_TARGET_ARCH_ARM
|
| void InstructionSelector::VisitFloat32x4Splat(Node* node) { UNIMPLEMENTED(); }
|
|
|