MIPS[64]: Support for some SIMD operations

src/mips64/assembler-mips64-inl.h

 
 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
@@ skipping 31 matching lines @@
 #include "src/assembler.h"
 #include "src/debug/debug.h"
 #include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {
 
 
 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(FPU); }
 
-bool CpuFeatures::SupportsWasmSimd128() { return false; }
+bool CpuFeatures::SupportsWasmSimd128() { return IsSupported(MIPS_SIMD); }
 
 // -----------------------------------------------------------------------------
 // Operand and MemOperand.
 
 Operand::Operand(int64_t immediate, RelocInfo::Mode rmode)  {
   rm_ = no_reg;
   imm64_ = immediate;
   rmode_ = rmode;
 }
 
@@ skipping 407 matching lines @@
 void Assembler::emit(uint64_t data) {
   CheckForEmitInForbiddenSlot();
   EmitHelper(data);
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_MIPS_ASSEMBLER_MIPS_INL_H_