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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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134 }; | 134 }; |
135 | 135 |
136 | 136 |
137 static void VisitRR(InstructionSelector* selector, ArchOpcode opcode, | 137 static void VisitRR(InstructionSelector* selector, ArchOpcode opcode, |
138 Node* node) { | 138 Node* node) { |
139 Mips64OperandGenerator g(selector); | 139 Mips64OperandGenerator g(selector); |
140 selector->Emit(opcode, g.DefineAsRegister(node), | 140 selector->Emit(opcode, g.DefineAsRegister(node), |
141 g.UseRegister(node->InputAt(0))); | 141 g.UseRegister(node->InputAt(0))); |
142 } | 142 } |
143 | 143 |
| 144 static void VisitRRI(InstructionSelector* selector, ArchOpcode opcode, |
| 145 Node* node) { |
| 146 Mips64OperandGenerator g(selector); |
| 147 int32_t imm = OpParameter<int32_t>(node); |
| 148 selector->Emit(opcode, g.DefineAsRegister(node), |
| 149 g.UseRegister(node->InputAt(0)), g.UseImmediate(imm)); |
| 150 } |
| 151 |
| 152 static void VisitRRIR(InstructionSelector* selector, ArchOpcode opcode, |
| 153 Node* node) { |
| 154 Mips64OperandGenerator g(selector); |
| 155 int32_t imm = OpParameter<int32_t>(node); |
| 156 selector->Emit(opcode, g.DefineAsRegister(node), |
| 157 g.UseRegister(node->InputAt(0)), g.UseImmediate(imm), |
| 158 g.UseRegister(node->InputAt(1))); |
| 159 } |
144 | 160 |
145 static void VisitRRR(InstructionSelector* selector, ArchOpcode opcode, | 161 static void VisitRRR(InstructionSelector* selector, ArchOpcode opcode, |
146 Node* node) { | 162 Node* node) { |
147 Mips64OperandGenerator g(selector); | 163 Mips64OperandGenerator g(selector); |
148 selector->Emit(opcode, g.DefineAsRegister(node), | 164 selector->Emit(opcode, g.DefineAsRegister(node), |
149 g.UseRegister(node->InputAt(0)), | 165 g.UseRegister(node->InputAt(0)), |
150 g.UseRegister(node->InputAt(1))); | 166 g.UseRegister(node->InputAt(1))); |
151 } | 167 } |
152 | 168 |
153 | 169 |
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2635 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value)); | 2651 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value)); |
2636 } | 2652 } |
2637 } | 2653 } |
2638 | 2654 |
2639 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); } | 2655 void InstructionSelector::VisitAtomicExchange(Node* node) { UNIMPLEMENTED(); } |
2640 | 2656 |
2641 void InstructionSelector::VisitAtomicCompareExchange(Node* node) { | 2657 void InstructionSelector::VisitAtomicCompareExchange(Node* node) { |
2642 UNIMPLEMENTED(); | 2658 UNIMPLEMENTED(); |
2643 } | 2659 } |
2644 | 2660 |
| 2661 void InstructionSelector::VisitInt32x4Splat(Node* node) { |
| 2662 VisitRR(this, kMips64Int32x4Splat, node); |
| 2663 } |
| 2664 |
| 2665 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) { |
| 2666 VisitRRI(this, kMips64Int32x4ExtractLane, node); |
| 2667 } |
| 2668 |
| 2669 void InstructionSelector::VisitInt32x4ReplaceLane(Node* node) { |
| 2670 VisitRRIR(this, kMips64Int32x4ReplaceLane, node); |
| 2671 } |
| 2672 |
| 2673 void InstructionSelector::VisitInt32x4Add(Node* node) { |
| 2674 VisitRRR(this, kMips64Int32x4Add, node); |
| 2675 } |
| 2676 |
| 2677 void InstructionSelector::VisitInt32x4Sub(Node* node) { |
| 2678 VisitRRR(this, kMips64Int32x4Sub, node); |
| 2679 } |
| 2680 |
| 2681 void InstructionSelector::VisitSimd128Zero(Node* node) { |
| 2682 Mips64OperandGenerator g(this); |
| 2683 Emit(kMips64Simd128Zero, g.DefineSameAsFirst(node)); |
| 2684 } |
| 2685 |
| 2686 void InstructionSelector::VisitSimd1x4Zero(Node* node) { |
| 2687 Mips64OperandGenerator g(this); |
| 2688 Emit(kMips64Simd128Zero, g.DefineSameAsFirst(node)); |
| 2689 } |
| 2690 |
| 2691 void InstructionSelector::VisitSimd1x8Zero(Node* node) { |
| 2692 Mips64OperandGenerator g(this); |
| 2693 Emit(kMips64Simd128Zero, g.DefineSameAsFirst(node)); |
| 2694 } |
| 2695 |
| 2696 void InstructionSelector::VisitSimd1x16Zero(Node* node) { |
| 2697 Mips64OperandGenerator g(this); |
| 2698 Emit(kMips64Simd128Zero, g.DefineSameAsFirst(node)); |
| 2699 } |
| 2700 |
2645 // static | 2701 // static |
2646 MachineOperatorBuilder::Flags | 2702 MachineOperatorBuilder::Flags |
2647 InstructionSelector::SupportedMachineOperatorFlags() { | 2703 InstructionSelector::SupportedMachineOperatorFlags() { |
2648 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; | 2704 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; |
2649 return flags | MachineOperatorBuilder::kWord32Ctz | | 2705 return flags | MachineOperatorBuilder::kWord32Ctz | |
2650 MachineOperatorBuilder::kWord64Ctz | | 2706 MachineOperatorBuilder::kWord64Ctz | |
2651 MachineOperatorBuilder::kWord32Popcnt | | 2707 MachineOperatorBuilder::kWord32Popcnt | |
2652 MachineOperatorBuilder::kWord64Popcnt | | 2708 MachineOperatorBuilder::kWord64Popcnt | |
2653 MachineOperatorBuilder::kWord32ShiftIsSafe | | 2709 MachineOperatorBuilder::kWord32ShiftIsSafe | |
2654 MachineOperatorBuilder::kInt32DivIsSafe | | 2710 MachineOperatorBuilder::kInt32DivIsSafe | |
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2674 } else { | 2730 } else { |
2675 DCHECK(kArchVariant == kMips64r2); | 2731 DCHECK(kArchVariant == kMips64r2); |
2676 return MachineOperatorBuilder::AlignmentRequirements:: | 2732 return MachineOperatorBuilder::AlignmentRequirements:: |
2677 NoUnalignedAccessSupport(); | 2733 NoUnalignedAccessSupport(); |
2678 } | 2734 } |
2679 } | 2735 } |
2680 | 2736 |
2681 } // namespace compiler | 2737 } // namespace compiler |
2682 } // namespace internal | 2738 } // namespace internal |
2683 } // namespace v8 | 2739 } // namespace v8 |
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