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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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159 V(Mips64Float32Min) \ | 159 V(Mips64Float32Min) \ |
160 V(Mips64Float64Min) \ | 160 V(Mips64Float64Min) \ |
161 V(Mips64Float64SilenceNaN) \ | 161 V(Mips64Float64SilenceNaN) \ |
162 V(Mips64Push) \ | 162 V(Mips64Push) \ |
163 V(Mips64StoreToStackSlot) \ | 163 V(Mips64StoreToStackSlot) \ |
164 V(Mips64ByteSwap64) \ | 164 V(Mips64ByteSwap64) \ |
165 V(Mips64ByteSwap32) \ | 165 V(Mips64ByteSwap32) \ |
166 V(Mips64StackClaim) \ | 166 V(Mips64StackClaim) \ |
167 V(Mips64Seb) \ | 167 V(Mips64Seb) \ |
168 V(Mips64Seh) \ | 168 V(Mips64Seh) \ |
169 V(Mips64AssertEqual) | 169 V(Mips64AssertEqual) \ |
| 170 V(Mips64Simd128Zero) \ |
| 171 V(Mips64Int32x4Splat) \ |
| 172 V(Mips64Int32x4ExtractLane) \ |
| 173 V(Mips64Int32x4ReplaceLane) \ |
| 174 V(Mips64Int32x4Add) \ |
| 175 V(Mips64Int32x4Sub) |
170 | 176 |
171 // Addressing modes represent the "shape" of inputs to an instruction. | 177 // Addressing modes represent the "shape" of inputs to an instruction. |
172 // Many instructions support multiple addressing modes. Addressing modes | 178 // Many instructions support multiple addressing modes. Addressing modes |
173 // are encoded into the InstructionCode of the instruction and tell the | 179 // are encoded into the InstructionCode of the instruction and tell the |
174 // code generator after register allocation which assembler method to call. | 180 // code generator after register allocation which assembler method to call. |
175 // | 181 // |
176 // We use the following local notation for addressing modes: | 182 // We use the following local notation for addressing modes: |
177 // | 183 // |
178 // R = register | 184 // R = register |
179 // O = register or stack slot | 185 // O = register or stack slot |
180 // D = double register | 186 // D = double register |
181 // I = immediate (handle, external, int32) | 187 // I = immediate (handle, external, int32) |
182 // MRI = [register + immediate] | 188 // MRI = [register + immediate] |
183 // MRR = [register + register] | 189 // MRR = [register + register] |
184 // TODO(plind): Add the new r6 address modes. | 190 // TODO(plind): Add the new r6 address modes. |
185 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 191 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
186 V(MRI) /* [%r0 + K] */ \ | 192 V(MRI) /* [%r0 + K] */ \ |
187 V(MRR) /* [%r0 + %r1] */ | 193 V(MRR) /* [%r0 + %r1] */ |
188 | 194 |
189 | 195 |
190 } // namespace compiler | 196 } // namespace compiler |
191 } // namespace internal | 197 } // namespace internal |
192 } // namespace v8 | 198 } // namespace v8 |
193 | 199 |
194 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 200 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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