MIPS[64]: Support for some SIMD operations

src/compiler/instruction-selector.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector.h"
 
 #include <limits>
 
 #include "src/assembler-inl.h"
 #include "src/base/adapters.h"
@@ skipping 2024 matching lines @@
 
 void InstructionSelector::VisitInt32PairMul(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord32PairShl(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); }
 #endif  // V8_TARGET_ARCH_64_BIT
 
-#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
+#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32 && \
+    !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64
 void InstructionSelector::VisitInt32x4Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt32x4ReplaceLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt32x4Add(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Sub(Node* node) { UNIMPLEMENTED(); }
-#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
+#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32 &&
+        // !V8_TARGET_ARCH_MIPS && !V8_TARGET_ARCH_MIPS64
 
 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
 void InstructionSelector::VisitInt32x4Mul(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Max(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Min(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Equal(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4NotEqual(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4ShiftLeftByScalar(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt32x4ShiftRightByScalar(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitUint32x4ShiftRightByScalar(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitUint32x4Max(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); }
+#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
 
+#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS && \
+    !V8_TARGET_ARCH_MIPS64
 void InstructionSelector::VisitSimd128Zero(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd1x4Zero(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd1x8Zero(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd1x16Zero(Node* node) { UNIMPLEMENTED(); }
-#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
+#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_MIPS &&
+        // !V8_TARGET_ARCH_MIPS64
 
 #if !V8_TARGET_ARCH_ARM
 void InstructionSelector::VisitFloat32x4Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitFloat32x4ExtractLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitFloat32x4ReplaceLane(Node* node) {
   UNIMPLEMENTED();
@@ skipping 638 matching lines @@
   return new (instruction_zone()) FrameStateDescriptor(
       instruction_zone(), state_info.type(), state_info.bailout_id(),
       state_info.state_combine(), parameters, locals, stack,
       state_info.shared_info(), outer_state);
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8