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Issue 2752013003: Improve instruction scheduling when calling the store buffer stub. (Closed)
Patch Set: Created 3 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
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1784 } 1784 }
1785 // A store buffer update is required. 1785 // A store buffer update is required.
1786 RegList regs = (1 << CODE_REG) | (1 << LR); 1786 RegList regs = (1 << CODE_REG) | (1 << LR);
1787 if (value != R0) { 1787 if (value != R0) {
1788 regs |= (1 << R0); // Preserve R0. 1788 regs |= (1 << R0); // Preserve R0.
1789 } 1789 }
1790 PushList(regs); 1790 PushList(regs);
1791 if (object != R0) { 1791 if (object != R0) {
1792 mov(R0, Operand(object)); 1792 mov(R0, Operand(object));
1793 } 1793 }
1794 ldr(LR, Address(THR, Thread::update_store_buffer_entry_point_offset()));
1794 ldr(CODE_REG, Address(THR, Thread::update_store_buffer_code_offset())); 1795 ldr(CODE_REG, Address(THR, Thread::update_store_buffer_code_offset()));
1795 ldr(LR, Address(THR, Thread::update_store_buffer_entry_point_offset()));
1796 blx(LR); 1796 blx(LR);
1797 PopList(regs); 1797 PopList(regs);
1798 Bind(&done); 1798 Bind(&done);
1799 } 1799 }
1800 1800
1801 1801
1802 void Assembler::StoreIntoObjectOffset(Register object, 1802 void Assembler::StoreIntoObjectOffset(Register object,
1803 int32_t offset, 1803 int32_t offset,
1804 Register value, 1804 Register value,
1805 bool can_value_be_smi) { 1805 bool can_value_be_smi) {
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3731 3731
3732 3732
3733 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3733 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3734 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3734 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3735 return fpu_reg_names[reg]; 3735 return fpu_reg_names[reg];
3736 } 3736 }
3737 3737
3738 } // namespace dart 3738 } // namespace dart
3739 3739
3740 #endif // defined TARGET_ARCH_ARM 3740 #endif // defined TARGET_ARCH_ARM
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