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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> | 5 #include <assert.h> |
| 6 #include <stdarg.h> | 6 #include <stdarg.h> |
| 7 #include <stdio.h> | 7 #include <stdio.h> |
| 8 | 8 |
| 9 #if V8_TARGET_ARCH_IA32 | 9 #if V8_TARGET_ARCH_IA32 |
| 10 | 10 |
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| 722 | 722 |
| 723 // Returns number of bytes used, including *data. | 723 // Returns number of bytes used, including *data. |
| 724 int DisassemblerIA32::CMov(byte* data) { | 724 int DisassemblerIA32::CMov(byte* data) { |
| 725 DCHECK_EQ(0x0F, *data); | 725 DCHECK_EQ(0x0F, *data); |
| 726 byte cond = *(data + 1) & 0x0F; | 726 byte cond = *(data + 1) & 0x0F; |
| 727 const char* mnem = conditional_move_mnem[cond]; | 727 const char* mnem = conditional_move_mnem[cond]; |
| 728 int op_size = PrintOperands(mnem, REG_OPER_OP_ORDER, data + 2); | 728 int op_size = PrintOperands(mnem, REG_OPER_OP_ORDER, data + 2); |
| 729 return 2 + op_size; // includes 0x0F | 729 return 2 + op_size; // includes 0x0F |
| 730 } | 730 } |
| 731 | 731 |
| 732 const char* sf_str[4] = {"", "rl", "ra", "ll"}; |
| 732 | 733 |
| 733 int DisassemblerIA32::AVXInstruction(byte* data) { | 734 int DisassemblerIA32::AVXInstruction(byte* data) { |
| 734 byte opcode = *data; | 735 byte opcode = *data; |
| 735 byte* current = data + 1; | 736 byte* current = data + 1; |
| 736 if (vex_66() && vex_0f38()) { | 737 if (vex_66() && vex_0f38()) { |
| 737 int mod, regop, rm, vvvv = vex_vreg(); | 738 int mod, regop, rm, vvvv = vex_vreg(); |
| 738 get_modrm(*current, &mod, ®op, &rm); | 739 get_modrm(*current, &mod, ®op, &rm); |
| 739 switch (opcode) { | 740 switch (opcode) { |
| 740 case 0x99: | 741 case 0x99: |
| 741 AppendToBuffer("vfmadd132s%c %s,%s,", float_size_code(), | 742 AppendToBuffer("vfmadd132s%c %s,%s,", float_size_code(), |
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| 1007 case 0x54: | 1008 case 0x54: |
| 1008 AppendToBuffer("vandpd %s,%s,", NameOfXMMRegister(regop), | 1009 AppendToBuffer("vandpd %s,%s,", NameOfXMMRegister(regop), |
| 1009 NameOfXMMRegister(vvvv)); | 1010 NameOfXMMRegister(vvvv)); |
| 1010 current += PrintRightXMMOperand(current); | 1011 current += PrintRightXMMOperand(current); |
| 1011 break; | 1012 break; |
| 1012 case 0x57: | 1013 case 0x57: |
| 1013 AppendToBuffer("vxorpd %s,%s,", NameOfXMMRegister(regop), | 1014 AppendToBuffer("vxorpd %s,%s,", NameOfXMMRegister(regop), |
| 1014 NameOfXMMRegister(vvvv)); | 1015 NameOfXMMRegister(vvvv)); |
| 1015 current += PrintRightXMMOperand(current); | 1016 current += PrintRightXMMOperand(current); |
| 1016 break; | 1017 break; |
| 1018 case 0x71: |
| 1019 AppendToBuffer("vps%sw %s,%s", sf_str[regop / 2], |
| 1020 NameOfXMMRegister(vvvv), NameOfXMMRegister(rm)); |
| 1021 current++; |
| 1022 AppendToBuffer(",%u", *current++); |
| 1023 break; |
| 1024 case 0x72: |
| 1025 AppendToBuffer("vps%sd %s,%s", sf_str[regop / 2], |
| 1026 NameOfXMMRegister(vvvv), NameOfXMMRegister(rm)); |
| 1027 current++; |
| 1028 AppendToBuffer(",%u", *current++); |
| 1029 break; |
| 1017 #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \ | 1030 #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \ |
| 1018 case 0x##opcode: { \ | 1031 case 0x##opcode: { \ |
| 1019 AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \ | 1032 AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \ |
| 1020 NameOfXMMRegister(vvvv)); \ | 1033 NameOfXMMRegister(vvvv)); \ |
| 1021 current += PrintRightXMMOperand(current); \ | 1034 current += PrintRightXMMOperand(current); \ |
| 1022 break; \ | 1035 break; \ |
| 1023 } | 1036 } |
| 1024 | 1037 |
| 1025 SSE2_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) | 1038 SSE2_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) |
| 1026 #undef DECLARE_SSE_AVX_DIS_CASE | 1039 #undef DECLARE_SSE_AVX_DIS_CASE |
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| 1854 data++; | 1867 data++; |
| 1855 AppendToBuffer("nop"); // 2 byte nop. | 1868 AppendToBuffer("nop"); // 2 byte nop. |
| 1856 } else if (*data == 0xF3) { | 1869 } else if (*data == 0xF3) { |
| 1857 data++; | 1870 data++; |
| 1858 int mod, regop, rm; | 1871 int mod, regop, rm; |
| 1859 get_modrm(*data, &mod, ®op, &rm); | 1872 get_modrm(*data, &mod, ®op, &rm); |
| 1860 AppendToBuffer("psllq %s,%s", | 1873 AppendToBuffer("psllq %s,%s", |
| 1861 NameOfXMMRegister(regop), | 1874 NameOfXMMRegister(regop), |
| 1862 NameOfXMMRegister(rm)); | 1875 NameOfXMMRegister(rm)); |
| 1863 data++; | 1876 data++; |
| 1877 } else if (*data == 0x71) { |
| 1878 data++; |
| 1879 int mod, regop, rm; |
| 1880 get_modrm(*data, &mod, ®op, &rm); |
| 1881 int8_t imm8 = static_cast<int8_t>(data[1]); |
| 1882 AppendToBuffer("ps%sw %s,%d", sf_str[regop / 2], |
| 1883 NameOfXMMRegister(rm), static_cast<int>(imm8)); |
| 1884 data += 2; |
| 1864 } else if (*data == 0x72) { | 1885 } else if (*data == 0x72) { |
| 1865 data++; | 1886 data++; |
| 1866 int mod, regop, rm; | 1887 int mod, regop, rm; |
| 1867 get_modrm(*data, &mod, ®op, &rm); | 1888 get_modrm(*data, &mod, ®op, &rm); |
| 1868 int8_t imm8 = static_cast<int8_t>(data[1]); | 1889 int8_t imm8 = static_cast<int8_t>(data[1]); |
| 1869 DCHECK(regop == esi || regop == edx); | 1890 AppendToBuffer("ps%sd %s,%d", sf_str[regop / 2], |
| 1870 AppendToBuffer("%s %s,%d", (regop == esi) ? "pslld" : "psrld", | |
| 1871 NameOfXMMRegister(rm), static_cast<int>(imm8)); | 1891 NameOfXMMRegister(rm), static_cast<int>(imm8)); |
| 1872 data += 2; | 1892 data += 2; |
| 1873 } else if (*data == 0x73) { | 1893 } else if (*data == 0x73) { |
| 1874 data++; | 1894 data++; |
| 1875 int mod, regop, rm; | 1895 int mod, regop, rm; |
| 1876 get_modrm(*data, &mod, ®op, &rm); | 1896 get_modrm(*data, &mod, ®op, &rm); |
| 1877 int8_t imm8 = static_cast<int8_t>(data[1]); | 1897 int8_t imm8 = static_cast<int8_t>(data[1]); |
| 1878 DCHECK(regop == esi || regop == edx); | 1898 DCHECK(regop == esi || regop == edx); |
| 1879 AppendToBuffer("%s %s,%d", | 1899 AppendToBuffer("ps%sq %s,%d", sf_str[regop / 2], |
| 1880 (regop == esi) ? "psllq" : "psrlq", | 1900 NameOfXMMRegister(rm), static_cast<int>(imm8)); |
| 1881 NameOfXMMRegister(rm), | |
| 1882 static_cast<int>(imm8)); | |
| 1883 data += 2; | 1901 data += 2; |
| 1884 } else if (*data == 0xD3) { | 1902 } else if (*data == 0xD3) { |
| 1885 data++; | 1903 data++; |
| 1886 int mod, regop, rm; | 1904 int mod, regop, rm; |
| 1887 get_modrm(*data, &mod, ®op, &rm); | 1905 get_modrm(*data, &mod, ®op, &rm); |
| 1888 AppendToBuffer("psrlq %s,%s", | 1906 AppendToBuffer("psrlq %s,%s", |
| 1889 NameOfXMMRegister(regop), | 1907 NameOfXMMRegister(regop), |
| 1890 NameOfXMMRegister(rm)); | 1908 NameOfXMMRegister(rm)); |
| 1891 data++; | 1909 data++; |
| 1892 } else if (*data == 0x7F) { | 1910 } else if (*data == 0x7F) { |
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| 2343 fprintf(f, " "); | 2361 fprintf(f, " "); |
| 2344 } | 2362 } |
| 2345 fprintf(f, " %s\n", buffer.start()); | 2363 fprintf(f, " %s\n", buffer.start()); |
| 2346 } | 2364 } |
| 2347 } | 2365 } |
| 2348 | 2366 |
| 2349 | 2367 |
| 2350 } // namespace disasm | 2368 } // namespace disasm |
| 2351 | 2369 |
| 2352 #endif // V8_TARGET_ARCH_IA32 | 2370 #endif // V8_TARGET_ARCH_IA32 |
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