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Side by Side Diff: src/ia32/sse-instr.h

Issue 2744643004: [ia32] Add some SSE2, SSE4 instructions and AVX version for SIMD (Closed)
Patch Set: Move punpckldq/punpckhdq to LIST Created 3 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_SSE_INSTR_H_ 5 #ifndef V8_SSE_INSTR_H_
6 #define V8_SSE_INSTR_H_ 6 #define V8_SSE_INSTR_H_
7 7
8 #define SSE2_INSTRUCTION_LIST(V) \ 8 #define SSE2_INSTRUCTION_LIST(V) \
9 V(paddb, 66, 0F, FC) \
10 V(paddw, 66, 0F, FD) \
9 V(paddd, 66, 0F, FE) \ 11 V(paddd, 66, 0F, FE) \
10 V(psubd, 66, 0F, FA) 12 V(paddsb, 66, 0F, EC) \
13 V(paddsw, 66, 0F, ED) \
14 V(paddusb, 66, 0F, DC) \
15 V(paddusw, 66, 0F, DD) \
16 V(pand, 66, 0F, DB) \
17 V(pcmpeqb, 66, 0F, 74) \
18 V(pcmpeqw, 66, 0F, 75) \
19 V(pcmpeqd, 66, 0F, 76) \
20 V(pcmpgtb, 66, 0F, 64) \
21 V(pcmpgtw, 66, 0F, 65) \
22 V(pcmpgtd, 66, 0F, 66) \
23 V(pmaxsw, 66, 0F, EE) \
24 V(pmaxub, 66, 0F, DE) \
25 V(pminsw, 66, 0F, EA) \
26 V(pminub, 66, 0F, DA) \
27 V(pmullw, 66, 0F, D5) \
28 V(por, 66, 0F, EB) \
29 V(psllw, 66, 0F, F1) \
30 V(pslld, 66, 0F, F2) \
31 V(psraw, 66, 0F, E1) \
32 V(psrad, 66, 0F, E2) \
33 V(psrlw, 66, 0F, D1) \
34 V(psrld, 66, 0F, D2) \
35 V(psubb, 66, 0F, F8) \
36 V(psubw, 66, 0F, F9) \
37 V(psubd, 66, 0F, FA) \
38 V(psubsb, 66, 0F, E8) \
39 V(psubsw, 66, 0F, E9) \
40 V(psubusb, 66, 0F, D8) \
41 V(psubusw, 66, 0F, D9) \
42 V(punpckhdq, 66, 0F, 6A) \
43 V(punpckldq, 66, 0F, 62) \
44 V(pxor, 66, 0F, EF)
45
46 #define SSE4_INSTRUCTION_LIST(V) \
47 V(pminsb, 66, 0F, 38, 38) \
48 V(pminsd, 66, 0F, 38, 39) \
49 V(pminuw, 66, 0F, 38, 3A) \
50 V(pminud, 66, 0F, 38, 3B) \
51 V(pmaxsb, 66, 0F, 38, 3C) \
52 V(pmaxsd, 66, 0F, 38, 3D) \
53 V(pmaxuw, 66, 0F, 38, 3E) \
54 V(pmaxud, 66, 0F, 38, 3F) \
55 V(pmulld, 66, 0F, 38, 40)
11 56
12 #endif // V8_SSE_INSTR_H_ 57 #endif // V8_SSE_INSTR_H_
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