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Issue 2744643004: [ia32] Add some SSE2, SSE4 instructions and AVX version for SIMD (Closed)
Patch Set: Move punpckldq/punpckhdq to LIST Created 3 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> 5 #include <assert.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdio.h> 7 #include <stdio.h>
8 8
9 #if V8_TARGET_ARCH_IA32 9 #if V8_TARGET_ARCH_IA32
10 10
(...skipping 784 matching lines...) Expand 10 before | Expand all | Expand 10 after
795 case 0xbf: 795 case 0xbf:
796 AppendToBuffer("vfnmsub231s%c %s,%s,", float_size_code(), 796 AppendToBuffer("vfnmsub231s%c %s,%s,", float_size_code(),
797 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); 797 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
798 current += PrintRightXMMOperand(current); 798 current += PrintRightXMMOperand(current);
799 break; 799 break;
800 case 0xf7: 800 case 0xf7:
801 AppendToBuffer("shlx %s,", NameOfCPURegister(regop)); 801 AppendToBuffer("shlx %s,", NameOfCPURegister(regop));
802 current += PrintRightOperand(current); 802 current += PrintRightOperand(current);
803 AppendToBuffer(",%s", NameOfCPURegister(vvvv)); 803 AppendToBuffer(",%s", NameOfCPURegister(vvvv));
804 break; 804 break;
805 #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, notUsed3, \
806 opcode) \
807 case 0x##opcode: { \
808 AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \
809 NameOfXMMRegister(vvvv)); \
810 current += PrintRightXMMOperand(current); \
811 break; \
812 }
813
814 SSE4_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE)
815 #undef DECLARE_SSE_AVX_DIS_CASE
805 default: 816 default:
806 UnimplementedInstruction(); 817 UnimplementedInstruction();
807 } 818 }
808 } else if (vex_f2() && vex_0f()) { 819 } else if (vex_f2() && vex_0f()) {
809 int mod, regop, rm, vvvv = vex_vreg(); 820 int mod, regop, rm, vvvv = vex_vreg();
810 get_modrm(*current, &mod, &regop, &rm); 821 get_modrm(*current, &mod, &regop, &rm);
811 switch (opcode) { 822 switch (opcode) {
812 case 0x58: 823 case 0x58:
813 AppendToBuffer("vaddsd %s,%s,", NameOfXMMRegister(regop), 824 AppendToBuffer("vaddsd %s,%s,", NameOfXMMRegister(regop),
814 NameOfXMMRegister(vvvv)); 825 NameOfXMMRegister(vvvv));
(...skipping 874 matching lines...) Expand 10 before | Expand all | Expand 10 after
1689 data++; 1700 data++;
1690 AppendToBuffer("%s ", "test_w"); 1701 AppendToBuffer("%s ", "test_w");
1691 data += PrintRightOperand(data); 1702 data += PrintRightOperand(data);
1692 int imm = *reinterpret_cast<int16_t*>(data); 1703 int imm = *reinterpret_cast<int16_t*>(data);
1693 AppendToBuffer(",0x%x", imm); 1704 AppendToBuffer(",0x%x", imm);
1694 data += 2; 1705 data += 2;
1695 } else if (*data == 0x0F) { 1706 } else if (*data == 0x0F) {
1696 data++; 1707 data++;
1697 if (*data == 0x38) { 1708 if (*data == 0x38) {
1698 data++; 1709 data++;
1699 if (*data == 0x17) { 1710 byte op = *data;
1700 data++; 1711 data++;
1701 int mod, regop, rm; 1712 int mod, regop, rm;
1702 get_modrm(*data, &mod, &regop, &rm); 1713 get_modrm(*data, &mod, &regop, &rm);
1703 AppendToBuffer("ptest %s,%s", 1714 switch (op) {
1704 NameOfXMMRegister(regop), 1715 case 0x17:
1705 NameOfXMMRegister(rm)); 1716 AppendToBuffer("ptest %s,%s", NameOfXMMRegister(regop),
1706 data++; 1717 NameOfXMMRegister(rm));
1707 } else if (*data == 0x2A) { 1718 data++;
1708 // movntdqa 1719 break;
1709 UnimplementedInstruction(); 1720 #define SSE4_DIS_CASE(instruction, notUsed1, notUsed2, notUsed3, opcode) \
1710 } else { 1721 case 0x##opcode: { \
1711 UnimplementedInstruction(); 1722 AppendToBuffer(#instruction " %s,", NameOfXMMRegister(regop)); \
1723 data += PrintRightXMMOperand(data); \
1724 break; \
1725 }
1726
1727 SSE4_INSTRUCTION_LIST(SSE4_DIS_CASE)
1728 #undef SSE4_DIS_CASE
1729 default:
1730 UnimplementedInstruction();
1712 } 1731 }
1713 } else if (*data == 0x3A) { 1732 } else if (*data == 0x3A) {
1714 data++; 1733 data++;
1715 if (*data == 0x0A) { 1734 if (*data == 0x0A) {
1716 data++; 1735 data++;
1717 int mod, regop, rm; 1736 int mod, regop, rm;
1718 get_modrm(*data, &mod, &regop, &rm); 1737 get_modrm(*data, &mod, &regop, &rm);
1719 int8_t imm8 = static_cast<int8_t>(data[1]); 1738 int8_t imm8 = static_cast<int8_t>(data[1]);
1720 AppendToBuffer("roundss %s,%s,%d", NameOfXMMRegister(regop), 1739 AppendToBuffer("roundss %s,%s,%d", NameOfXMMRegister(regop),
1721 NameOfXMMRegister(rm), static_cast<int>(imm8)); 1740 NameOfXMMRegister(rm), static_cast<int>(imm8));
(...skipping 102 matching lines...) Expand 10 before | Expand all | Expand 10 after
1824 } else if (*data == 0x70) { 1843 } else if (*data == 0x70) {
1825 data++; 1844 data++;
1826 int mod, regop, rm; 1845 int mod, regop, rm;
1827 get_modrm(*data, &mod, &regop, &rm); 1846 get_modrm(*data, &mod, &regop, &rm);
1828 int8_t imm8 = static_cast<int8_t>(data[1]); 1847 int8_t imm8 = static_cast<int8_t>(data[1]);
1829 AppendToBuffer("pshufd %s,%s,%d", 1848 AppendToBuffer("pshufd %s,%s,%d",
1830 NameOfXMMRegister(regop), 1849 NameOfXMMRegister(regop),
1831 NameOfXMMRegister(rm), 1850 NameOfXMMRegister(rm),
1832 static_cast<int>(imm8)); 1851 static_cast<int>(imm8));
1833 data += 2; 1852 data += 2;
1834 } else if (*data == 0x62) {
1835 data++;
1836 int mod, regop, rm;
1837 get_modrm(*data, &mod, &regop, &rm);
1838 AppendToBuffer("punpckldq %s,%s", NameOfXMMRegister(regop),
1839 NameOfXMMRegister(rm));
1840 data++;
1841 } else if (*data == 0x6A) {
1842 data++;
1843 int mod, regop, rm;
1844 get_modrm(*data, &mod, &regop, &rm);
1845 AppendToBuffer("punpckhdq %s,%s", NameOfXMMRegister(regop),
1846 NameOfXMMRegister(rm));
1847 data++;
1848 } else if (*data == 0x76) {
1849 data++;
1850 int mod, regop, rm;
1851 get_modrm(*data, &mod, &regop, &rm);
1852 AppendToBuffer("pcmpeqd %s,%s",
1853 NameOfXMMRegister(regop),
1854 NameOfXMMRegister(rm));
1855 data++;
1856 } else if (*data == 0x90) { 1853 } else if (*data == 0x90) {
1857 data++; 1854 data++;
1858 AppendToBuffer("nop"); // 2 byte nop. 1855 AppendToBuffer("nop"); // 2 byte nop.
1859 } else if (*data == 0xF3) { 1856 } else if (*data == 0xF3) {
1860 data++; 1857 data++;
1861 int mod, regop, rm; 1858 int mod, regop, rm;
1862 get_modrm(*data, &mod, &regop, &rm); 1859 get_modrm(*data, &mod, &regop, &rm);
1863 AppendToBuffer("psllq %s,%s", 1860 AppendToBuffer("psllq %s,%s",
1864 NameOfXMMRegister(regop), 1861 NameOfXMMRegister(regop),
1865 NameOfXMMRegister(rm)); 1862 NameOfXMMRegister(rm));
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
1907 data += PrintRightOperand(data); 1904 data += PrintRightOperand(data);
1908 AppendToBuffer(",%s", NameOfXMMRegister(regop)); 1905 AppendToBuffer(",%s", NameOfXMMRegister(regop));
1909 } else if (*data == 0xC4) { 1906 } else if (*data == 0xC4) {
1910 data++; 1907 data++;
1911 int mod, regop, rm; 1908 int mod, regop, rm;
1912 get_modrm(*data, &mod, &regop, &rm); 1909 get_modrm(*data, &mod, &regop, &rm);
1913 AppendToBuffer("pinsrw %s,", NameOfXMMRegister(regop)); 1910 AppendToBuffer("pinsrw %s,", NameOfXMMRegister(regop));
1914 data += PrintRightOperand(data); 1911 data += PrintRightOperand(data);
1915 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); 1912 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data));
1916 data++; 1913 data++;
1917 } else if (*data == 0xDB) {
1918 data++;
1919 int mod, regop, rm;
1920 get_modrm(*data, &mod, &regop, &rm);
1921 AppendToBuffer("pand %s,%s",
1922 NameOfXMMRegister(regop),
1923 NameOfXMMRegister(rm));
1924 data++;
1925 } else if (*data == 0xE7) { 1914 } else if (*data == 0xE7) {
1926 data++; 1915 data++;
1927 int mod, regop, rm; 1916 int mod, regop, rm;
1928 get_modrm(*data, &mod, &regop, &rm); 1917 get_modrm(*data, &mod, &regop, &rm);
1929 if (mod == 3) { 1918 if (mod == 3) {
1930 // movntdq 1919 // movntdq
1931 UnimplementedInstruction(); 1920 UnimplementedInstruction();
1932 } else { 1921 } else {
1933 UnimplementedInstruction(); 1922 UnimplementedInstruction();
1934 } 1923 }
1935 } else if (*data == 0xEF) {
1936 data++;
1937 int mod, regop, rm;
1938 get_modrm(*data, &mod, &regop, &rm);
1939 AppendToBuffer("pxor %s,%s",
1940 NameOfXMMRegister(regop),
1941 NameOfXMMRegister(rm));
1942 data++;
1943 } else if (*data == 0xEB) {
1944 data++;
1945 int mod, regop, rm;
1946 get_modrm(*data, &mod, &regop, &rm);
1947 AppendToBuffer("por %s,%s",
1948 NameOfXMMRegister(regop),
1949 NameOfXMMRegister(rm));
1950 data++;
1951 } else if (*data == 0xFA) {
1952 data++;
1953 int mod, regop, rm;
1954 get_modrm(*data, &mod, &regop, &rm);
1955 AppendToBuffer("psubd %s,", NameOfXMMRegister(regop));
1956 data += PrintRightXMMOperand(data);
1957 } else if (*data == 0xFE) {
1958 data++;
1959 int mod, regop, rm;
1960 get_modrm(*data, &mod, &regop, &rm);
1961 AppendToBuffer("paddd %s,", NameOfXMMRegister(regop));
1962 data += PrintRightXMMOperand(data);
1963 } else if (*data == 0xB1) { 1924 } else if (*data == 0xB1) {
1964 data++; 1925 data++;
1965 data += PrintOperands("cmpxchg_w", OPER_REG_OP_ORDER, data); 1926 data += PrintOperands("cmpxchg_w", OPER_REG_OP_ORDER, data);
1966 } else { 1927 } else {
1967 UnimplementedInstruction(); 1928 byte op = *data;
1929 data++;
1930 int mod, regop, rm;
1931 get_modrm(*data, &mod, &regop, &rm);
1932 switch (op) {
1933 #define SSE2_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \
1934 case 0x##opcode: { \
1935 AppendToBuffer(#instruction " %s,", NameOfXMMRegister(regop)); \
1936 data += PrintRightXMMOperand(data); \
1937 break; \
1938 }
1939
1940 SSE2_INSTRUCTION_LIST(SSE2_DIS_CASE)
1941 #undef SSE2_DIS_CASE
1942 default:
1943 UnimplementedInstruction();
1944 }
1968 } 1945 }
1969 } else { 1946 } else {
1970 UnimplementedInstruction(); 1947 UnimplementedInstruction();
1971 } 1948 }
1972 break; 1949 break;
1973 1950
1974 case 0xFE: 1951 case 0xFE:
1975 { data++; 1952 { data++;
1976 int mod, regop, rm; 1953 int mod, regop, rm;
1977 get_modrm(*data, &mod, &regop, &rm); 1954 get_modrm(*data, &mod, &regop, &rm);
(...skipping 388 matching lines...) Expand 10 before | Expand all | Expand 10 after
2366 fprintf(f, " "); 2343 fprintf(f, " ");
2367 } 2344 }
2368 fprintf(f, " %s\n", buffer.start()); 2345 fprintf(f, " %s\n", buffer.start());
2369 } 2346 }
2370 } 2347 }
2371 2348
2372 2349
2373 } // namespace disasm 2350 } // namespace disasm
2374 2351
2375 #endif // V8_TARGET_ARCH_IA32 2352 #endif // V8_TARGET_ARCH_IA32
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