[ARM] Implement more NEON permutation instructions.

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 1297 matching lines @@
             const NeonMemOperand& src);
   void vst1(NeonSize size,
             const NeonListOperand& src,
             const NeonMemOperand& dst);
   void vmovl(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src);
 
   // Only unconditional core <-> scalar moves are currently supported.
   void vmov(NeonDataType dt, DwVfpRegister dst, int index, Register src);
   void vmov(NeonDataType dt, Register dst, DwVfpRegister src, int index);
 
-  void vmov(const QwNeonRegister dst, const QwNeonRegister src);
-  void vmvn(const QwNeonRegister dst, const QwNeonRegister src);
+  void vmov(QwNeonRegister dst, QwNeonRegister src);
+  // Only unconditional vdup is currently supported.

[martyn.capewell, 2017/03/09 14:03:36]

The conditional form of this vdup is deprecated, so you can either update or
remove this comment - see ARM ARM (DDI0406C) page A8-288.

[bbudge, 2017/03/09 20:51:05]

Done.

+  void vdup(NeonSize size, QwNeonRegister dst, Register src);
+  void vdup(QwNeonRegister dst, SwVfpRegister src);
+
+  void vcvt_f32_s32(QwNeonRegister dst, QwNeonRegister src);
+  void vcvt_f32_u32(QwNeonRegister dst, QwNeonRegister src);
+  void vcvt_s32_f32(QwNeonRegister dst, QwNeonRegister src);
+  void vcvt_u32_f32(QwNeonRegister dst, QwNeonRegister src);
+
+  void vmvn(QwNeonRegister dst, QwNeonRegister src);
   void vswp(DwVfpRegister dst, DwVfpRegister src);
   void vswp(QwNeonRegister dst, QwNeonRegister src);
-  // vdup conditional execution isn't supported.
-  void vdup(NeonSize size, const QwNeonRegister dst, const Register src);
-  void vdup(const QwNeonRegister dst, const SwVfpRegister src);
+  void vabs(QwNeonRegister dst, QwNeonRegister src);
+  void vabs(NeonSize size, QwNeonRegister dst, QwNeonRegister src);
+  void vneg(QwNeonRegister dst, QwNeonRegister src);
+  void vneg(NeonSize size, QwNeonRegister dst, QwNeonRegister src);
 
-  void vcvt_f32_s32(const QwNeonRegister dst, const QwNeonRegister src);
-  void vcvt_f32_u32(const QwNeonRegister dst, const QwNeonRegister src);
-  void vcvt_s32_f32(const QwNeonRegister dst, const QwNeonRegister src);
-  void vcvt_u32_f32(const QwNeonRegister dst, const QwNeonRegister src);
-
-  void vabs(const QwNeonRegister dst, const QwNeonRegister src);
-  void vabs(NeonSize size, const QwNeonRegister dst, const QwNeonRegister src);
-  void vneg(const QwNeonRegister dst, const QwNeonRegister src);
-  void vneg(NeonSize size, const QwNeonRegister dst, const QwNeonRegister src);
+  void vand(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void veor(DwVfpRegister dst, DwVfpRegister src1, DwVfpRegister src2);
-  void vand(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
+  void veor(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vbsl(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
-  void veor(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vorr(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vadd(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vadd(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
             QwNeonRegister src2);
   void vqadd(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
              QwNeonRegister src2);
   void vsub(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vsub(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
             QwNeonRegister src2);
   void vqsub(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
@@ skipping 18 matching lines @@
   void vrecpe(QwNeonRegister dst, QwNeonRegister src);
   void vrsqrte(QwNeonRegister dst, QwNeonRegister src);
   void vrecps(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vrsqrts(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vtst(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
             QwNeonRegister src2);
   void vceq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
   void vceq(NeonSize size, QwNeonRegister dst, QwNeonRegister src1,
             QwNeonRegister src2);
   void vcge(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
-  void vcge(NeonDataType dt, QwNeonRegister dst,
-            QwNeonRegister src1, QwNeonRegister src2);
+  void vcge(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
+            QwNeonRegister src2);
   void vcgt(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2);
-  void vcgt(NeonDataType dt, QwNeonRegister dst,
-            QwNeonRegister src1, QwNeonRegister src2);
-  void vext(const QwNeonRegister dst, const QwNeonRegister src1,
-            const QwNeonRegister src2, int bytes);
-  void vzip(NeonSize size, const QwNeonRegister dst, const QwNeonRegister src);
-  void vrev16(NeonSize size, const QwNeonRegister dst,
-            const QwNeonRegister src);
-  void vrev32(NeonSize size, const QwNeonRegister dst,
-            const QwNeonRegister src);
-  void vrev64(NeonSize size, const QwNeonRegister dst,
-            const QwNeonRegister src);
-  void vtbl(const DwVfpRegister dst, const NeonListOperand& list,
-            const DwVfpRegister index);
-  void vtbx(const DwVfpRegister dst, const NeonListOperand& list,
-            const DwVfpRegister index);
+  void vcgt(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
+            QwNeonRegister src2);
+  void vext(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2,
+            int bytes);
+  void vzip(NeonSize size, QwNeonRegister src1, QwNeonRegister src2);
+  void vuzp(NeonSize size, QwNeonRegister src1, QwNeonRegister src2);
+  void vrev16(NeonSize size, QwNeonRegister dst, QwNeonRegister src);
+  void vrev32(NeonSize size, QwNeonRegister dst, QwNeonRegister src);
+  void vrev64(NeonSize size, QwNeonRegister dst, QwNeonRegister src);
+  void vtrn(NeonSize size, QwNeonRegister src1, QwNeonRegister src2);
+  void vtbl(DwVfpRegister dst, const NeonListOperand& list,
+            DwVfpRegister index);
+  void vtbx(DwVfpRegister dst, const NeonListOperand& list,
+            DwVfpRegister index);
 
   // Pseudo instructions
 
   // Different nop operations are used by the code generator to detect certain
   // states of the generated code.
   enum NopMarkerTypes {
     NON_MARKING_NOP = 0,
     DEBUG_BREAK_NOP,
     // IC markers.
     PROPERTY_ACCESS_INLINED,
@@ skipping 384 matching lines @@
 class EnsureSpace BASE_EMBEDDED {
  public:
   INLINE(explicit EnsureSpace(Assembler* assembler));
 };
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_