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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 6 | 6 |
| 7 #if V8_TARGET_ARCH_ARM | 7 #if V8_TARGET_ARCH_ARM |
| 8 | 8 |
| 9 #include "src/assembler-inl.h" | 9 #include "src/assembler-inl.h" |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
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| 89 int MacroAssembler::CallStubSize( | 89 int MacroAssembler::CallStubSize( |
| 90 CodeStub* stub, TypeFeedbackId ast_id, Condition cond) { | 90 CodeStub* stub, TypeFeedbackId ast_id, Condition cond) { |
| 91 return CallSize(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond); | 91 return CallSize(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond); |
| 92 } | 92 } |
| 93 | 93 |
| 94 | 94 |
| 95 void MacroAssembler::Call(Address target, | 95 void MacroAssembler::Call(Address target, |
| 96 RelocInfo::Mode rmode, | 96 RelocInfo::Mode rmode, |
| 97 Condition cond, | 97 Condition cond, |
| 98 TargetAddressStorageMode mode) { | 98 TargetAddressStorageMode mode) { |
| 99 // Check if we have to emit the constant pool before we block it. |
| 100 MaybeCheckConstPool(); |
| 99 // Block constant pool for the call instruction sequence. | 101 // Block constant pool for the call instruction sequence. |
| 100 BlockConstPoolScope block_const_pool(this); | 102 BlockConstPoolScope block_const_pool(this); |
| 101 Label start; | 103 Label start; |
| 102 bind(&start); | 104 bind(&start); |
| 103 | 105 |
| 104 bool old_predictable_code_size = predictable_code_size(); | 106 bool old_predictable_code_size = predictable_code_size(); |
| 105 if (mode == NEVER_INLINE_TARGET_ADDRESS) { | 107 if (mode == NEVER_INLINE_TARGET_ADDRESS) { |
| 106 set_predictable_code_size(true); | 108 set_predictable_code_size(true); |
| 107 } | 109 } |
| 108 | 110 |
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| 134 | 136 |
| 135 | 137 |
| 136 int MacroAssembler::CallSize(Handle<Code> code, | 138 int MacroAssembler::CallSize(Handle<Code> code, |
| 137 RelocInfo::Mode rmode, | 139 RelocInfo::Mode rmode, |
| 138 TypeFeedbackId ast_id, | 140 TypeFeedbackId ast_id, |
| 139 Condition cond) { | 141 Condition cond) { |
| 140 AllowDeferredHandleDereference using_raw_address; | 142 AllowDeferredHandleDereference using_raw_address; |
| 141 return CallSize(reinterpret_cast<Address>(code.location()), rmode, cond); | 143 return CallSize(reinterpret_cast<Address>(code.location()), rmode, cond); |
| 142 } | 144 } |
| 143 | 145 |
| 144 | 146 void MacroAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode, |
| 145 void MacroAssembler::Call(Handle<Code> code, | 147 TypeFeedbackId ast_id, Condition cond, |
| 146 RelocInfo::Mode rmode, | |
| 147 TypeFeedbackId ast_id, | |
| 148 Condition cond, | |
| 149 TargetAddressStorageMode mode) { | 148 TargetAddressStorageMode mode) { |
| 150 Label start; | 149 Label start; |
| 151 bind(&start); | 150 bind(&start); |
| 152 DCHECK(RelocInfo::IsCodeTarget(rmode)); | 151 DCHECK(RelocInfo::IsCodeTarget(rmode)); |
| 153 if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) { | 152 if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) { |
| 154 SetRecordedAstId(ast_id); | 153 SetRecordedAstId(ast_id); |
| 155 rmode = RelocInfo::CODE_TARGET_WITH_ID; | 154 rmode = RelocInfo::CODE_TARGET_WITH_ID; |
| 156 } | 155 } |
| 157 // 'code' is always generated ARM code, never THUMB code | 156 // 'code' is always generated ARM code, never THUMB code |
| 158 AllowDeferredHandleDereference embedding_raw_address; | 157 AllowDeferredHandleDereference embedding_raw_address; |
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| 3880 } | 3879 } |
| 3881 } | 3880 } |
| 3882 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); | 3881 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); |
| 3883 add(result, result, Operand(dividend, LSR, 31)); | 3882 add(result, result, Operand(dividend, LSR, 31)); |
| 3884 } | 3883 } |
| 3885 | 3884 |
| 3886 } // namespace internal | 3885 } // namespace internal |
| 3887 } // namespace v8 | 3886 } // namespace v8 |
| 3888 | 3887 |
| 3889 #endif // V8_TARGET_ARCH_ARM | 3888 #endif // V8_TARGET_ARCH_ARM |
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