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Side by Side Diff: runtime/vm/intermediate_language_mips.cc

Issue 2737303003: Allow dispatch to use a range of Class-ids in tests (Closed)
Patch Set: Feedback from Slava Created 3 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS.
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
(...skipping 5012 matching lines...) Expand 10 before | Expand all | Expand 10 after
5023 Register value = locs()->in(0).reg(); 5023 Register value = locs()->in(0).reg();
5024 Register temp = locs()->temp(0).reg(); 5024 Register temp = locs()->temp(0).reg();
5025 Label is_ok; 5025 Label is_ok;
5026 if (unary_checks().GetReceiverClassIdAt(0) == kSmiCid) { 5026 if (unary_checks().GetReceiverClassIdAt(0) == kSmiCid) {
5027 __ andi(CMPRES1, value, Immediate(kSmiTagMask)); 5027 __ andi(CMPRES1, value, Immediate(kSmiTagMask));
5028 __ beq(CMPRES1, ZR, &is_ok); 5028 __ beq(CMPRES1, ZR, &is_ok);
5029 } else { 5029 } else {
5030 __ andi(CMPRES1, value, Immediate(kSmiTagMask)); 5030 __ andi(CMPRES1, value, Immediate(kSmiTagMask));
5031 __ beq(CMPRES1, ZR, deopt); 5031 __ beq(CMPRES1, ZR, deopt);
5032 } 5032 }
5033 __ LoadClassId(temp, value); 5033 Register biased_cid = temp;
5034 __ LoadClassId(biased_cid, value);
5035
5036 GrowableArray<CidRangeTarget> sorted_ic_data;
5037 FlowGraphCompiler::SortICDataByCount(unary_checks(), &sorted_ic_data,
5038 /* drop_smi = */ true);
5034 5039
5035 if (IsDenseSwitch()) { 5040 if (IsDenseSwitch()) {
5036 ASSERT(cids_[0] < cids_[cids_.length() - 1]); 5041 ASSERT(cids_[0] < cids_[cids_.length() - 1]);
5037 __ LoadImmediate(TMP, cids_[0]); 5042 __ LoadImmediate(TMP, cids_[0]);
5038 __ subu(temp, temp, TMP); 5043 __ subu(biased_cid, biased_cid, TMP);
5039 __ LoadImmediate(TMP, cids_[cids_.length() - 1] - cids_[0]); 5044 __ LoadImmediate(TMP, cids_[cids_.length() - 1] - cids_[0]);
5040 __ BranchUnsignedGreater(temp, TMP, deopt); 5045 __ BranchUnsignedGreater(biased_cid, TMP, deopt);
5041 5046
5042 intptr_t mask = ComputeCidMask(); 5047 intptr_t mask = ComputeCidMask();
5043 if (!IsDenseMask(mask)) { 5048 if (!IsDenseMask(mask)) {
5044 // Only need mask if there are missing numbers in the range. 5049 // Only need mask if there are missing numbers in the range.
5045 ASSERT(cids_.length() > 2); 5050 ASSERT(cids_.length() > 2);
5046 Register mask_reg = locs()->temp(1).reg(); 5051 Register mask_reg = locs()->temp(1).reg();
5047 __ LoadImmediate(mask_reg, 1); 5052 __ LoadImmediate(mask_reg, 1);
5048 __ sllv(mask_reg, mask_reg, temp); 5053 __ sllv(mask_reg, mask_reg, biased_cid);
5049 __ AndImmediate(mask_reg, mask_reg, mask); 5054 __ AndImmediate(mask_reg, mask_reg, mask);
5050 __ beq(mask_reg, ZR, deopt); 5055 __ beq(mask_reg, ZR, deopt);
5051 } 5056 }
5052 } else { 5057 } else {
5053 GrowableArray<CidTarget> sorted_ic_data;
5054 FlowGraphCompiler::SortICDataByCount(unary_checks(), &sorted_ic_data,
5055 /* drop_smi = */ true);
5056 const intptr_t num_checks = sorted_ic_data.length(); 5058 const intptr_t num_checks = sorted_ic_data.length();
5059 int bias = 0;
5057 for (intptr_t i = 0; i < num_checks; i++) { 5060 for (intptr_t i = 0; i < num_checks; i++) {
5058 const intptr_t cid = sorted_ic_data[i].cid; 5061 const intptr_t cid_start = sorted_ic_data[i].cid_start;
5059 ASSERT(cid != kSmiCid); 5062 const intptr_t cid_end = sorted_ic_data[i].cid_end;
5060 __ LoadImmediate(TMP, cid); 5063 ASSERT(cid_start > kSmiCid || cid_end < kSmiCid);
5061 __ subu(CMPRES1, temp, TMP); 5064 if (cid_start == cid_end) {
5062 if (i == (num_checks - 1)) { 5065 __ LoadImmediate(TMP, cid_start - bias);
5063 __ bne(CMPRES1, ZR, deopt); 5066 if (i == (num_checks - 1)) {
5067 __ bne(biased_cid, TMP, deopt);
5068 } else {
5069 __ beq(biased_cid, TMP, &is_ok);
5070 }
5064 } else { 5071 } else {
5065 __ beq(CMPRES1, ZR, &is_ok); 5072 // For class ID ranges use a subtract followed by an unsigned
5073 // comparison to check both ends of the ranges with one comparison.
5074 __ AddImmediate(biased_cid, biased_cid, bias - cid_start);
5075 bias = cid_start;
5076 // TODO(erikcorry): We should use sltiu instead of the temporary TMP if
5077 // the range is small enough.
5078 __ LoadImmediate(TMP, cid_end - cid_start);
5079 // Reverse comparison so we get 1 if biased_cid > tmp ie cid is out of
5080 // range.
5081 __ sltu(TMP, TMP, biased_cid);
5082 if (i == (num_checks - 1)) {
5083 __ bne(TMP, ZR, deopt);
5084 } else {
5085 __ beq(TMP, ZR, &is_ok);
5086 }
5066 } 5087 }
5067 } 5088 }
5068 } 5089 }
5069 __ Bind(&is_ok); 5090 __ Bind(&is_ok);
5070 } 5091 }
5071 5092
5072 5093
5073 LocationSummary* CheckSmiInstr::MakeLocationSummary(Zone* zone, 5094 LocationSummary* CheckSmiInstr::MakeLocationSummary(Zone* zone,
5074 bool opt) const { 5095 bool opt) const {
5075 const intptr_t kNumInputs = 1; 5096 const intptr_t kNumInputs = 1;
(...skipping 935 matching lines...) Expand 10 before | Expand all | Expand 10 after
6011 compiler->GenerateRuntimeCall(TokenPosition::kNoSource, deopt_id(), 6032 compiler->GenerateRuntimeCall(TokenPosition::kNoSource, deopt_id(),
6012 kGrowRegExpStackRuntimeEntry, 1, locs()); 6033 kGrowRegExpStackRuntimeEntry, 1, locs());
6013 __ lw(result, Address(SP, 1 * kWordSize)); 6034 __ lw(result, Address(SP, 1 * kWordSize));
6014 __ addiu(SP, SP, Immediate(2 * kWordSize)); 6035 __ addiu(SP, SP, Immediate(2 * kWordSize));
6015 } 6036 }
6016 6037
6017 6038
6018 } // namespace dart 6039 } // namespace dart
6019 6040
6020 #endif // defined TARGET_ARCH_MIPS 6041 #endif // defined TARGET_ARCH_MIPS
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