runtime/vm/constants_dbc.h - Issue 2737303003: Allow dispatch to use a range of Class-ids in tests

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Issue 2737303003: Allow dispatch to use a range of Class-ids in tests (Closed)

Patch Set: Feedback from Slava Created 3 years, 9 months ago

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1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file	1 // Copyright (c) 2016, the Dart project authors. Please see the AUTHORS file

2 // for details. All rights reserved. Use of this source code is governed by a	2 // for details. All rights reserved. Use of this source code is governed by a

3 // BSD-style license that can be found in the LICENSE file.	3 // BSD-style license that can be found in the LICENSE file.

4	4

5 #ifndef RUNTIME_VM_CONSTANTS_DBC_H_	5 #ifndef RUNTIME_VM_CONSTANTS_DBC_H_

6 #define RUNTIME_VM_CONSTANTS_DBC_H_	6 #define RUNTIME_VM_CONSTANTS_DBC_H_

7	7

8 #include "platform/globals.h"	8 #include "platform/globals.h"

9 #include "platform/assert.h"	9 #include "platform/assert.h"

10 #include "platform/utils.h"	10 #include "platform/utils.h"

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163 //	163 //

164 // Invoke native function SP[-1] with argc_tag SP[0].	164 // Invoke native function SP[-1] with argc_tag SP[0].

165 //	165 //

166 // - PushPolymorphicInstanceCall ArgC, D	166 // - PushPolymorphicInstanceCall ArgC, D

167 //	167 //

168 // Skips 2*D + 1 instructions and pushes a function object onto the stack	168 // Skips 2*D + 1 instructions and pushes a function object onto the stack

169 // if one can be found as follows. Otherwise skips only 2*D instructions.	169 // if one can be found as follows. Otherwise skips only 2*D instructions.

170 // The function is looked up in the IC data encoded in the following 2*D	170 // The function is looked up in the IC data encoded in the following 2*D

171 // Nop instructions. The Nop instructions should be arranged in pairs with	171 // Nop instructions. The Nop instructions should be arranged in pairs with

172 // the first being the cid, and the second being the function to push if	172 // the first being the cid, and the second being the function to push if

173 // the cid is the cid of the receiver found at SP[-(1 + ArgC)].	173 // the cid matches the cid in the pair.

	174 //

	175 // - PushPolymorphicInstanceCallByRange ArgC, D

	176 //

	177 // Skips 3*D + 1 instructions and pushes a function object onto the stack

	178 // if one can be found as follows. Otherwise skips only 3*D instructions.

	179 // The function is looked up in the IC data encoded in the following 3*D

	180 // Nop instructions. The Nop instructions should be arranged in triples with

	181 // the first being the start cid, the second being the number of cids, and

	182 // the third being the function to push if the cid is in the range given

	183 // by the first two Nop instructions.

174 //	184 //

175 // - OneByteStringFromCharCode rA, rX	185 // - OneByteStringFromCharCode rA, rX

176 //	186 //

177 // Load the one-character symbol with the char code given by the Smi	187 // Load the one-character symbol with the char code given by the Smi

178 // in FP[rX] into FP[rA].	188 // in FP[rX] into FP[rA].

179 //	189 //

180 // - StringToCharCode rA, rX	190 // - StringToCharCode rA, rX

181 //	191 //

182 // Load and smi-encode the single char code of the string in FP[rX] into	192 // Load and smi-encode the single char code of the string in FP[rX] into

183 // FP[rA]. If the string's length is not 1, load smi -1 instead.	193 // FP[rA]. If the string's length is not 1, load smi -1 instead.

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583 // a dense switch with low cid encoded in the following Nop instruction, and	593 // a dense switch with low cid encoded in the following Nop instruction, and

584 // the cid mask encoded in the Nop instruction after that, or if D == 1 and	594 // the cid mask encoded in the Nop instruction after that, or if D == 1 and

585 // FP[rA] is a Smi. Skips 2 instructions otherwise.	595 // FP[rA] is a Smi. Skips 2 instructions otherwise.

586 //	596 //

587 // - CheckCids rA, rB, rC	597 // - CheckCids rA, rB, rC

588 //	598 //

589 // Skips rC + 1 instructions if the object at FP[rA] is a Smi and	599 // Skips rC + 1 instructions if the object at FP[rA] is a Smi and

590 // rB == 1, or if FP[rA]'s cid is found in the array of cids encoded by the	600 // rB == 1, or if FP[rA]'s cid is found in the array of cids encoded by the

591 // following rC Nop instructions. Otherwise skips only rC instructions.	601 // following rC Nop instructions. Otherwise skips only rC instructions.

592 //	602 //

	603 // - CheckCidsByRange rA, rB, rC

	604 //

	605 // Skips rC + 1 instructions if the object at FP[rA] is a Smi and rB ==

	606 // 1, or if FP[rA]'s cid is found in the array of cid ranges encoded by the

	607 // following rC Nop instructions. The cid ranges from a inclusive to b

	608 // exclusive are coded in pairs of (a, b - a). Otherwise skips only 2

	609 // instructions.

	610 //

593 // - CheckStack	611 // - CheckStack

594 //	612 //

595 // Compare SP against isolate stack limit and call StackOverflow handler if	613 // Compare SP against isolate stack limit and call StackOverflow handler if

596 // necessary.	614 // necessary.

597 //	615 //

598 // - DebugStep, DebugBreak A	616 // - DebugStep, DebugBreak A

599 //	617 //

600 // Debugger support. DebugBreak is bytecode that can be patched into the	618 // Debugger support. DebugBreak is bytecode that can be patched into the

601 // instruction stream to trigger in place breakpoint.	619 // instruction stream to trigger in place breakpoint.

602 //	620 //

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643 // num immediate operand	661 // num immediate operand

644 // lit constant literal from object pool	662 // lit constant literal from object pool

645 // reg register (unsigned FP relative local)	663 // reg register (unsigned FP relative local)

646 // xeg x-register (signed FP relative local)	664 // xeg x-register (signed FP relative local)

647 // tgt jump target relative to the PC of the current instruction	665 // tgt jump target relative to the PC of the current instruction

648 //	666 //

649 // TODO(vegorov) jump targets should be encoded relative to PC of the next	667 // TODO(vegorov) jump targets should be encoded relative to PC of the next

650 // instruction because PC is incremented immediately after fetch	668 // instruction because PC is incremented immediately after fetch

651 // and before decoding.	669 // and before decoding.

652 //	670 //

653 #define BYTECODES_LIST(V) \	671 #define BYTECODES_LIST(V) \

654 V(Trap, 0, ___, ___, ___) \	672 V(Trap, 0, ___, ___, ___) \

655 V(Nop, A_D, num, lit, ___) \	673 V(Nop, A_D, num, lit, ___) \

656 V(Compile, 0, ___, ___, ___) \	674 V(Compile, 0, ___, ___, ___) \

657 V(HotCheck, A_D, num, num, ___) \	675 V(HotCheck, A_D, num, num, ___) \

658 V(Intrinsic, A, num, ___, ___) \	676 V(Intrinsic, A, num, ___, ___) \

659 V(Drop1, 0, ___, ___, ___) \	677 V(Drop1, 0, ___, ___, ___) \

660 V(DropR, A, num, ___, ___) \	678 V(DropR, A, num, ___, ___) \

661 V(Drop, A, num, ___, ___) \	679 V(Drop, A, num, ___, ___) \

662 V(Jump, T, tgt, ___, ___) \	680 V(Jump, T, tgt, ___, ___) \

663 V(Return, A, reg, ___, ___) \	681 V(Return, A, reg, ___, ___) \

664 V(ReturnTOS, 0, ___, ___, ___) \	682 V(ReturnTOS, 0, ___, ___, ___) \

665 V(Move, A_X, reg, xeg, ___) \	683 V(Move, A_X, reg, xeg, ___) \

666 V(Swap, A_X, reg, xeg, ___) \	684 V(Swap, A_X, reg, xeg, ___) \

667 V(Push, X, xeg, ___, ___) \	685 V(Push, X, xeg, ___, ___) \

668 V(LoadConstant, A_D, reg, lit, ___) \	686 V(LoadConstant, A_D, reg, lit, ___) \

669 V(LoadClassId, A_D, reg, reg, ___) \	687 V(LoadClassId, A_D, reg, reg, ___) \

670 V(LoadClassIdTOS, 0, ___, ___, ___) \	688 V(LoadClassIdTOS, 0, ___, ___, ___) \

671 V(PushConstant, D, lit, ___, ___) \	689 V(PushConstant, D, lit, ___, ___) \

672 V(StoreLocal, X, xeg, ___, ___) \	690 V(StoreLocal, X, xeg, ___, ___) \

673 V(PopLocal, X, xeg, ___, ___) \	691 V(PopLocal, X, xeg, ___, ___) \

674 V(IndirectStaticCall, A_D, num, num, ___) \	692 V(IndirectStaticCall, A_D, num, num, ___) \

675 V(StaticCall, A_D, num, num, ___) \	693 V(StaticCall, A_D, num, num, ___) \

676 V(InstanceCall1, A_D, num, num, ___) \	694 V(InstanceCall1, A_D, num, num, ___) \

677 V(InstanceCall2, A_D, num, num, ___) \	695 V(InstanceCall2, A_D, num, num, ___) \

678 V(InstanceCall1Opt, A_D, num, num, ___) \	696 V(InstanceCall1Opt, A_D, num, num, ___) \

679 V(InstanceCall2Opt, A_D, num, num, ___) \	697 V(InstanceCall2Opt, A_D, num, num, ___) \

680 V(PushPolymorphicInstanceCall, A_D, num, num, ___) \	698 V(PushPolymorphicInstanceCall, A_D, num, num, ___) \

681 V(NativeCall, 0, ___, ___, ___) \	699 V(PushPolymorphicInstanceCallByRange, A_D, num, num, ___) \

682 V(NativeBootstrapCall, 0, ___, ___, ___) \	700 V(NativeCall, 0, ___, ___, ___) \

683 V(OneByteStringFromCharCode, A_X, reg, xeg, ___) \	701 V(NativeBootstrapCall, 0, ___, ___, ___) \

684 V(StringToCharCode, A_X, reg, xeg, ___) \	702 V(OneByteStringFromCharCode, A_X, reg, xeg, ___) \

685 V(AddTOS, 0, ___, ___, ___) \	703 V(StringToCharCode, A_X, reg, xeg, ___) \

686 V(SubTOS, 0, ___, ___, ___) \	704 V(AddTOS, 0, ___, ___, ___) \

687 V(MulTOS, 0, ___, ___, ___) \	705 V(SubTOS, 0, ___, ___, ___) \

688 V(BitOrTOS, 0, ___, ___, ___) \	706 V(MulTOS, 0, ___, ___, ___) \

689 V(BitAndTOS, 0, ___, ___, ___) \	707 V(BitOrTOS, 0, ___, ___, ___) \

690 V(EqualTOS, 0, ___, ___, ___) \	708 V(BitAndTOS, 0, ___, ___, ___) \

691 V(LessThanTOS, 0, ___, ___, ___) \	709 V(EqualTOS, 0, ___, ___, ___) \

692 V(GreaterThanTOS, 0, ___, ___, ___) \	710 V(LessThanTOS, 0, ___, ___, ___) \

693 V(Add, A_B_C, reg, reg, reg) \	711 V(GreaterThanTOS, 0, ___, ___, ___) \

694 V(Sub, A_B_C, reg, reg, reg) \	712 V(Add, A_B_C, reg, reg, reg) \

695 V(Mul, A_B_C, reg, reg, reg) \	713 V(Sub, A_B_C, reg, reg, reg) \

696 V(Div, A_B_C, reg, reg, reg) \	714 V(Mul, A_B_C, reg, reg, reg) \

697 V(Mod, A_B_C, reg, reg, reg) \	715 V(Div, A_B_C, reg, reg, reg) \

698 V(Shl, A_B_C, reg, reg, reg) \	716 V(Mod, A_B_C, reg, reg, reg) \

699 V(Shr, A_B_C, reg, reg, reg) \	717 V(Shl, A_B_C, reg, reg, reg) \

700 V(ShlImm, A_B_C, reg, reg, num) \	718 V(Shr, A_B_C, reg, reg, reg) \

701 V(Neg, A_D, reg, reg, ___) \	719 V(ShlImm, A_B_C, reg, reg, num) \

702 V(BitOr, A_B_C, reg, reg, reg) \	720 V(Neg, A_D, reg, reg, ___) \

703 V(BitAnd, A_B_C, reg, reg, reg) \	721 V(BitOr, A_B_C, reg, reg, reg) \

704 V(BitXor, A_B_C, reg, reg, reg) \	722 V(BitAnd, A_B_C, reg, reg, reg) \

705 V(BitNot, A_D, reg, reg, ___) \	723 V(BitXor, A_B_C, reg, reg, reg) \

706 V(Min, A_B_C, reg, reg, reg) \	724 V(BitNot, A_D, reg, reg, ___) \

707 V(Max, A_B_C, reg, reg, reg) \	725 V(Min, A_B_C, reg, reg, reg) \

708 V(WriteIntoDouble, A_D, reg, reg, ___) \	726 V(Max, A_B_C, reg, reg, reg) \

709 V(UnboxDouble, A_D, reg, reg, ___) \	727 V(WriteIntoDouble, A_D, reg, reg, ___) \

710 V(CheckedUnboxDouble, A_D, reg, reg, ___) \	728 V(UnboxDouble, A_D, reg, reg, ___) \

711 V(UnboxInt32, A_B_C, reg, reg, num) \	729 V(CheckedUnboxDouble, A_D, reg, reg, ___) \

712 V(BoxInt32, A_D, reg, reg, ___) \	730 V(UnboxInt32, A_B_C, reg, reg, num) \

713 V(BoxUint32, A_D, reg, reg, ___) \	731 V(BoxInt32, A_D, reg, reg, ___) \

714 V(SmiToDouble, A_D, reg, reg, ___) \	732 V(BoxUint32, A_D, reg, reg, ___) \

715 V(DoubleToSmi, A_D, reg, reg, ___) \	733 V(SmiToDouble, A_D, reg, reg, ___) \

716 V(DAdd, A_B_C, reg, reg, reg) \	734 V(DoubleToSmi, A_D, reg, reg, ___) \

717 V(DSub, A_B_C, reg, reg, reg) \	735 V(DAdd, A_B_C, reg, reg, reg) \

718 V(DMul, A_B_C, reg, reg, reg) \	736 V(DSub, A_B_C, reg, reg, reg) \

719 V(DDiv, A_B_C, reg, reg, reg) \	737 V(DMul, A_B_C, reg, reg, reg) \

720 V(DNeg, A_D, reg, reg, ___) \	738 V(DDiv, A_B_C, reg, reg, reg) \

721 V(DSqrt, A_D, reg, reg, ___) \	739 V(DNeg, A_D, reg, reg, ___) \

722 V(DMin, A_B_C, reg, reg, reg) \	740 V(DSqrt, A_D, reg, reg, ___) \

723 V(DMax, A_B_C, reg, reg, reg) \	741 V(DMin, A_B_C, reg, reg, reg) \

724 V(DCos, A_D, reg, reg, ___) \	742 V(DMax, A_B_C, reg, reg, reg) \

725 V(DSin, A_D, reg, reg, ___) \	743 V(DCos, A_D, reg, reg, ___) \

726 V(DPow, A_B_C, reg, reg, reg) \	744 V(DSin, A_D, reg, reg, ___) \

727 V(DMod, A_B_C, reg, reg, reg) \	745 V(DPow, A_B_C, reg, reg, reg) \

728 V(DTruncate, A_D, reg, reg, ___) \	746 V(DMod, A_B_C, reg, reg, reg) \

729 V(DFloor, A_D, reg, reg, ___) \	747 V(DTruncate, A_D, reg, reg, ___) \

730 V(DCeil, A_D, reg, reg, ___) \	748 V(DFloor, A_D, reg, reg, ___) \

731 V(DoubleToFloat, A_D, reg, reg, ___) \	749 V(DCeil, A_D, reg, reg, ___) \

732 V(FloatToDouble, A_D, reg, reg, ___) \	750 V(DoubleToFloat, A_D, reg, reg, ___) \

733 V(DoubleIsNaN, A, reg, ___, ___) \	751 V(FloatToDouble, A_D, reg, reg, ___) \

734 V(DoubleIsInfinite, A, reg, ___, ___) \	752 V(DoubleIsNaN, A, reg, ___, ___) \

735 V(StoreStaticTOS, D, lit, ___, ___) \	753 V(DoubleIsInfinite, A, reg, ___, ___) \

736 V(PushStatic, D, lit, ___, ___) \	754 V(StoreStaticTOS, D, lit, ___, ___) \

737 V(InitStaticTOS, 0, ___, ___, ___) \	755 V(PushStatic, D, lit, ___, ___) \

738 V(IfNeStrictTOS, 0, ___, ___, ___) \	756 V(InitStaticTOS, 0, ___, ___, ___) \

739 V(IfEqStrictTOS, 0, ___, ___, ___) \	757 V(IfNeStrictTOS, 0, ___, ___, ___) \

740 V(IfNeStrictNumTOS, 0, ___, ___, ___) \	758 V(IfEqStrictTOS, 0, ___, ___, ___) \

741 V(IfEqStrictNumTOS, 0, ___, ___, ___) \	759 V(IfNeStrictNumTOS, 0, ___, ___, ___) \

742 V(IfNeStrict, A_D, reg, reg, ___) \	760 V(IfEqStrictNumTOS, 0, ___, ___, ___) \

743 V(IfEqStrict, A_D, reg, reg, ___) \	761 V(IfNeStrict, A_D, reg, reg, ___) \

744 V(IfLe, A_D, reg, reg, ___) \	762 V(IfEqStrict, A_D, reg, reg, ___) \

745 V(IfLt, A_D, reg, reg, ___) \	763 V(IfLe, A_D, reg, reg, ___) \

746 V(IfGe, A_D, reg, reg, ___) \	764 V(IfLt, A_D, reg, reg, ___) \

747 V(IfGt, A_D, reg, reg, ___) \	765 V(IfGe, A_D, reg, reg, ___) \

748 V(IfULe, A_D, reg, reg, ___) \	766 V(IfGt, A_D, reg, reg, ___) \

749 V(IfULt, A_D, reg, reg, ___) \	767 V(IfULe, A_D, reg, reg, ___) \

750 V(IfUGe, A_D, reg, reg, ___) \	768 V(IfULt, A_D, reg, reg, ___) \

751 V(IfUGt, A_D, reg, reg, ___) \	769 V(IfUGe, A_D, reg, reg, ___) \

752 V(IfDNe, A_D, reg, reg, ___) \	770 V(IfUGt, A_D, reg, reg, ___) \

753 V(IfDEq, A_D, reg, reg, ___) \	771 V(IfDNe, A_D, reg, reg, ___) \

754 V(IfDLe, A_D, reg, reg, ___) \	772 V(IfDEq, A_D, reg, reg, ___) \

755 V(IfDLt, A_D, reg, reg, ___) \	773 V(IfDLe, A_D, reg, reg, ___) \

756 V(IfDGe, A_D, reg, reg, ___) \	774 V(IfDLt, A_D, reg, reg, ___) \

757 V(IfDGt, A_D, reg, reg, ___) \	775 V(IfDGe, A_D, reg, reg, ___) \

758 V(IfNeStrictNum, A_D, reg, reg, ___) \	776 V(IfDGt, A_D, reg, reg, ___) \

759 V(IfEqStrictNum, A_D, reg, reg, ___) \	777 V(IfNeStrictNum, A_D, reg, reg, ___) \

760 V(IfEqNull, A, reg, ___, ___) \	778 V(IfEqStrictNum, A_D, reg, reg, ___) \

761 V(IfNeNull, A, reg, ___, ___) \	779 V(IfEqNull, A, reg, ___, ___) \

762 V(CreateArrayTOS, 0, ___, ___, ___) \	780 V(IfNeNull, A, reg, ___, ___) \

763 V(CreateArrayOpt, A_B_C, reg, reg, reg) \	781 V(CreateArrayTOS, 0, ___, ___, ___) \

764 V(Allocate, D, lit, ___, ___) \	782 V(CreateArrayOpt, A_B_C, reg, reg, reg) \

765 V(AllocateT, 0, ___, ___, ___) \	783 V(Allocate, D, lit, ___, ___) \

766 V(AllocateOpt, A_D, reg, lit, ___) \	784 V(AllocateT, 0, ___, ___, ___) \

767 V(AllocateTOpt, A_D, reg, lit, ___) \	785 V(AllocateOpt, A_D, reg, lit, ___) \

768 V(StoreIndexedTOS, 0, ___, ___, ___) \	786 V(AllocateTOpt, A_D, reg, lit, ___) \

769 V(StoreIndexed, A_B_C, reg, reg, reg) \	787 V(StoreIndexedTOS, 0, ___, ___, ___) \

770 V(StoreIndexedUint8, A_B_C, reg, reg, reg) \	788 V(StoreIndexed, A_B_C, reg, reg, reg) \

771 V(StoreIndexedExternalUint8, A_B_C, reg, reg, reg) \	789 V(StoreIndexedUint8, A_B_C, reg, reg, reg) \

772 V(StoreIndexedOneByteString, A_B_C, reg, reg, reg) \	790 V(StoreIndexedExternalUint8, A_B_C, reg, reg, reg) \

773 V(StoreIndexedUint32, A_B_C, reg, reg, reg) \	791 V(StoreIndexedOneByteString, A_B_C, reg, reg, reg) \

774 V(StoreIndexedFloat32, A_B_C, reg, reg, reg) \	792 V(StoreIndexedUint32, A_B_C, reg, reg, reg) \

775 V(StoreIndexed4Float32, A_B_C, reg, reg, reg) \	793 V(StoreIndexedFloat32, A_B_C, reg, reg, reg) \

776 V(StoreIndexedFloat64, A_B_C, reg, reg, reg) \	794 V(StoreIndexed4Float32, A_B_C, reg, reg, reg) \

777 V(StoreIndexed8Float64, A_B_C, reg, reg, reg) \	795 V(StoreIndexedFloat64, A_B_C, reg, reg, reg) \

778 V(LoadIndexed, A_B_C, reg, reg, reg) \	796 V(StoreIndexed8Float64, A_B_C, reg, reg, reg) \

779 V(LoadIndexedUint8, A_B_C, reg, reg, reg) \	797 V(LoadIndexed, A_B_C, reg, reg, reg) \

780 V(LoadIndexedInt8, A_B_C, reg, reg, reg) \	798 V(LoadIndexedUint8, A_B_C, reg, reg, reg) \

781 V(LoadIndexedInt32, A_B_C, reg, reg, reg) \	799 V(LoadIndexedInt8, A_B_C, reg, reg, reg) \

782 V(LoadIndexedUint32, A_B_C, reg, reg, reg) \	800 V(LoadIndexedInt32, A_B_C, reg, reg, reg) \

783 V(LoadIndexedExternalUint8, A_B_C, reg, reg, reg) \	801 V(LoadIndexedUint32, A_B_C, reg, reg, reg) \

784 V(LoadIndexedExternalInt8, A_B_C, reg, reg, reg) \	802 V(LoadIndexedExternalUint8, A_B_C, reg, reg, reg) \

785 V(LoadIndexedFloat32, A_B_C, reg, reg, reg) \	803 V(LoadIndexedExternalInt8, A_B_C, reg, reg, reg) \

786 V(LoadIndexed4Float32, A_B_C, reg, reg, reg) \	804 V(LoadIndexedFloat32, A_B_C, reg, reg, reg) \

787 V(LoadIndexedFloat64, A_B_C, reg, reg, reg) \	805 V(LoadIndexed4Float32, A_B_C, reg, reg, reg) \

788 V(LoadIndexed8Float64, A_B_C, reg, reg, reg) \	806 V(LoadIndexedFloat64, A_B_C, reg, reg, reg) \

789 V(LoadIndexedOneByteString, A_B_C, reg, reg, reg) \	807 V(LoadIndexed8Float64, A_B_C, reg, reg, reg) \

790 V(LoadIndexedTwoByteString, A_B_C, reg, reg, reg) \	808 V(LoadIndexedOneByteString, A_B_C, reg, reg, reg) \

791 V(StoreField, A_B_C, reg, num, reg) \	809 V(LoadIndexedTwoByteString, A_B_C, reg, reg, reg) \

792 V(StoreFieldExt, A_D, reg, reg, ___) \	810 V(StoreField, A_B_C, reg, num, reg) \

793 V(StoreFieldTOS, D, num, ___, ___) \	811 V(StoreFieldExt, A_D, reg, reg, ___) \

794 V(LoadField, A_B_C, reg, reg, num) \	812 V(StoreFieldTOS, D, num, ___, ___) \

795 V(LoadFieldExt, A_D, reg, reg, ___) \	813 V(LoadField, A_B_C, reg, reg, num) \

796 V(LoadUntagged, A_B_C, reg, reg, num) \	814 V(LoadFieldExt, A_D, reg, reg, ___) \

797 V(LoadFieldTOS, D, num, ___, ___) \	815 V(LoadUntagged, A_B_C, reg, reg, num) \

798 V(BooleanNegateTOS, 0, ___, ___, ___) \	816 V(LoadFieldTOS, D, num, ___, ___) \

799 V(BooleanNegate, A_D, reg, reg, ___) \	817 V(BooleanNegateTOS, 0, ___, ___, ___) \

800 V(Throw, A, num, ___, ___) \	818 V(BooleanNegate, A_D, reg, reg, ___) \

801 V(Entry, A_B_C, num, num, num) \	819 V(Throw, A, num, ___, ___) \

802 V(EntryOptional, A_B_C, num, num, num) \	820 V(Entry, A_B_C, num, num, num) \

803 V(EntryOptimized, A_D, num, num, ___) \	821 V(EntryOptional, A_B_C, num, num, num) \

804 V(Frame, D, num, ___, ___) \	822 V(EntryOptimized, A_D, num, num, ___) \

805 V(SetFrame, A, num, ___, num) \	823 V(Frame, D, num, ___, ___) \

806 V(AllocateContext, D, num, ___, ___) \	824 V(SetFrame, A, num, ___, num) \

807 V(AllocateUninitializedContext, A_D, reg, num, ___) \	825 V(AllocateContext, D, num, ___, ___) \

808 V(CloneContext, 0, ___, ___, ___) \	826 V(AllocateUninitializedContext, A_D, reg, num, ___) \

809 V(MoveSpecial, A_D, reg, num, ___) \	827 V(CloneContext, 0, ___, ___, ___) \

810 V(InstantiateType, D, lit, ___, ___) \	828 V(MoveSpecial, A_D, reg, num, ___) \

811 V(InstantiateTypeArgumentsTOS, A_D, num, lit, ___) \	829 V(InstantiateType, D, lit, ___, ___) \

812 V(InstanceOf, A, num, ___, ___) \	830 V(InstantiateTypeArgumentsTOS, A_D, num, lit, ___) \

813 V(BadTypeError, 0, ___, ___, ___) \	831 V(InstanceOf, A, num, ___, ___) \

814 V(AssertAssignable, A_D, num, lit, ___) \	832 V(BadTypeError, 0, ___, ___, ___) \

815 V(AssertBoolean, A, num, ___, ___) \	833 V(AssertAssignable, A_D, num, lit, ___) \

816 V(TestSmi, A_D, reg, reg, ___) \	834 V(AssertBoolean, A, num, ___, ___) \

817 V(TestCids, A_D, reg, num, ___) \	835 V(TestSmi, A_D, reg, reg, ___) \

818 V(CheckSmi, A, reg, ___, ___) \	836 V(TestCids, A_D, reg, num, ___) \

819 V(CheckEitherNonSmi, A_D, reg, reg, ___) \	837 V(CheckSmi, A, reg, ___, ___) \

820 V(CheckClassId, A_D, reg, num, ___) \	838 V(CheckEitherNonSmi, A_D, reg, reg, ___) \

821 V(CheckDenseSwitch, A_D, reg, num, ___) \	839 V(CheckClassId, A_D, reg, num, ___) \

822 V(CheckCids, A_B_C, reg, num, num) \	840 V(CheckDenseSwitch, A_D, reg, num, ___) \

823 V(CheckStack, 0, ___, ___, ___) \	841 V(CheckCids, A_B_C, reg, num, num) \

824 V(CheckStackAlwaysExit, 0, ___, ___, ___) \	842 V(CheckCidsByRange, A_B_C, reg, num, num) \

825 V(DebugStep, 0, ___, ___, ___) \	843 V(CheckStack, 0, ___, ___, ___) \

826 V(DebugBreak, A, num, ___, ___) \	844 V(CheckStackAlwaysExit, 0, ___, ___, ___) \

827 V(Deopt, A_D, num, num, ___) \	845 V(DebugStep, 0, ___, ___, ___) \

828 V(DeoptRewind, 0, ___, ___, ___)	846 V(DebugBreak, A, num, ___, ___) \

	847 V(Deopt, A_D, num, num, ___) \

	848 V(DeoptRewind, 0, ___, ___, ___)

829	849

830 // clang-format on	850 // clang-format on

831	851

832 typedef uint32_t Instr;	852 typedef uint32_t Instr;

833	853

834 class Bytecode {	854 class Bytecode {

835 public:	855 public:

836 enum Opcode {	856 enum Opcode {

837 #define DECLARE_BYTECODE(name, encoding, op1, op2, op3) k##name,	857 #define DECLARE_BYTECODE(name, encoding, op1, op2, op3) k##name,

838 BYTECODES_LIST(DECLARE_BYTECODE)	858 BYTECODES_LIST(DECLARE_BYTECODE)

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963	983

964 // After a comparison, the condition NEXT_IS_TRUE means the following	984 // After a comparison, the condition NEXT_IS_TRUE means the following

965 // instruction is executed if the comparision is true and skipped over overwise.	985 // instruction is executed if the comparision is true and skipped over overwise.

966 // Conidition NEXT_IS_FALSE means the following instruction is executed if the	986 // Conidition NEXT_IS_FALSE means the following instruction is executed if the

967 // comparison is false and skipped over otherwise.	987 // comparison is false and skipped over otherwise.

968 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE };	988 enum Condition { NEXT_IS_TRUE, NEXT_IS_FALSE };

969	989

970 } // namespace dart	990 } // namespace dart

971	991

972 #endif // RUNTIME_VM_CONSTANTS_DBC_H_	992 #endif // RUNTIME_VM_CONSTANTS_DBC_H_

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