MIPS64: Fix declaration for bit() function.

src/mips64/assembler-mips64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 114 matching lines @@
     Register r = { code };
     return r;
   }
 
   bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; }
   bool is(Register reg) const { return reg_code == reg.reg_code; }
   int code() const {
     DCHECK(is_valid());
     return reg_code;
   }
-  constexpr int bit() const { return DCHECK(is_valid()), 1 << reg_code; }
+  int bit() const {
+    DCHECK(is_valid());
+    return 1 << reg_code;
+  }
 
   // Unfortunately we can't make this private in a struct.
   int reg_code;
 };
 
 // s7: context register
 // s3: lithium scratch
 // s4: lithium scratch2
 #define DECLARE_REGISTER(R) constexpr Register R = {Register::kCode_##R};
 GENERAL_REGISTERS(DECLARE_REGISTER)
@@ skipping 43 matching lines @@
     FPURegister reg;
     reg.reg_code = reg_code + 1;
     DCHECK(reg.is_valid());
     return reg;
   }
 
   int code() const {
     DCHECK(is_valid());
     return reg_code;
   }
-  constexpr int bit() const { return DCHECK(is_valid()), 1 << reg_code; }
+
+  int bit() const {
+    DCHECK(is_valid());
+    return 1 << reg_code;
+  }
 
   static FPURegister from_code(int code) {
     FPURegister r = {code};
     return r;
   }
   void setcode(int f) {
     reg_code = f;
     DCHECK(is_valid());
   }
   // Unfortunately we can't make this private in a struct.
@@ skipping 70 matching lines @@
 
 // FPU (coprocessor 1) control registers.
 // Currently only FCSR (#31) is implemented.
 struct FPUControlRegister {
   bool is_valid() const { return reg_code == kFCSRRegister; }
   bool is(FPUControlRegister creg) const { return reg_code == creg.reg_code; }
   int code() const {
     DCHECK(is_valid());
     return reg_code;
   }
-  constexpr int bit() const { return DCHECK(is_valid()), 1 << reg_code; }
+  int bit() const {
+    DCHECK(is_valid());
+    return 1 << reg_code;
+  }
   void setcode(int f) {
     reg_code = f;
     DCHECK(is_valid());
   }
   // Unfortunately we can't make this private in a struct.
   int reg_code;
 };
 
 constexpr FPUControlRegister no_fpucreg = {kInvalidFPUControlRegister};
 constexpr FPUControlRegister FCSR = {kFCSRRegister};
@@ skipping 1212 matching lines @@
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM_ASSEMBLER_MIPS_H_