[assembler] Make register definitions constexpr

src/arm64/assembler-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_ASSEMBLER_ARM64_H_
 #define V8_ARM64_ASSEMBLER_ARM64_H_
 
 #include <deque>
 #include <list>
 #include <map>
@@ skipping 45 matching lines @@
   V(q0)  V(q1)  V(q2)  V(q3)  V(q4)  V(q5)  V(q6)  V(q7)  \
   V(q8)  V(q9)  V(q10) V(q11) V(q12) V(q13) V(q14) V(q15)
 
 #define ALLOCATABLE_DOUBLE_REGISTERS(R)                   \
   R(d0)  R(d1)  R(d2)  R(d3)  R(d4)  R(d5)  R(d6)  R(d7)  \
   R(d8)  R(d9)  R(d10) R(d11) R(d12) R(d13) R(d14) R(d16) \
   R(d17) R(d18) R(d19) R(d20) R(d21) R(d22) R(d23) R(d24) \
   R(d25) R(d26) R(d27) R(d28)
 // clang-format on
 
-static const int kRegListSizeInBits = sizeof(RegList) * kBitsPerByte;
-
+constexpr int kRegListSizeInBits = sizeof(RegList) * kBitsPerByte;
 
 // Some CPURegister methods can return Register and FPRegister types, so we
 // need to declare them in advance.
 struct Register;
 struct FPRegister;
 
 
 struct CPURegister {
   enum Code {
 #define REGISTER_CODE(R) kCode_##R,
     GENERAL_REGISTERS(REGISTER_CODE)
 #undef REGISTER_CODE
         kAfterLast,
     kCode_no_reg = -1
   };
 
   enum RegisterType {
     // The kInvalid value is used to detect uninitialized static instances,
     // which are always zero-initialized before any constructors are called.
     kInvalid = 0,
     kRegister,
     kFPRegister,
     kNoRegister
   };
 
+  constexpr CPURegister() : CPURegister(0, 0, CPURegister::kNoRegister) {}
+
+  constexpr CPURegister(int reg_code, int reg_size, RegisterType reg_type)
+      : reg_code(reg_code), reg_size(reg_size), reg_type(reg_type) {}
+
   static CPURegister Create(int code, int size, RegisterType type) {
     CPURegister r = {code, size, type};
     return r;
   }
 
   int code() const;
   RegisterType type() const;
   RegList Bit() const;
   int SizeInBits() const;
   int SizeInBytes() const;
@@ skipping 28 matching lines @@
   int reg_size;
   RegisterType reg_type;
 };
 
 
 struct Register : public CPURegister {
   static Register Create(int code, int size) {
     return Register(CPURegister::Create(code, size, CPURegister::kRegister));
   }
 
-  Register() {
-    reg_code = 0;
-    reg_size = 0;
-    reg_type = CPURegister::kNoRegister;
-  }
+  constexpr Register() : CPURegister() {}
 
-  explicit Register(const CPURegister& r) {
-    reg_code = r.reg_code;
-    reg_size = r.reg_size;
-    reg_type = r.reg_type;
-    DCHECK(IsValidOrNone());
-  }
-
-  Register(const Register& r) {  // NOLINT(runtime/explicit)
-    reg_code = r.reg_code;
-    reg_size = r.reg_size;
-    reg_type = r.reg_type;
-    DCHECK(IsValidOrNone());
-  }
+  constexpr explicit Register(const CPURegister& r) : CPURegister(r) {}
 
   bool IsValid() const {
     DCHECK(IsRegister() || IsNone());
     return IsValidRegister();
   }
 
   static Register XRegFromCode(unsigned code);
   static Register WRegFromCode(unsigned code);
 
   // Start of V8 compatibility section ---------------------
   // These memebers are necessary for compilation.
   // A few of them may be unused for now.
 
-  static const int kNumRegisters = kNumberOfRegisters;
+  static constexpr int kNumRegisters = kNumberOfRegisters;
   STATIC_ASSERT(kNumRegisters == Code::kAfterLast);
   static int NumRegisters() { return kNumRegisters; }
 
   // We allow crankshaft to use the following registers:
   //   - x0 to x15
   //   - x18 to x24
   //   - x27 (also context)
   //
   // TODO(all): Register x25 is currently free and could be available for
   // crankshaft, but we don't use it as we might use it as a per function
   // literal pool pointer in the future.
   //
   // TODO(all): Consider storing cp in x25 to have only two ranges.
   // We split allocatable registers in three ranges called
   //   - "low range"
   //   - "high range"
   //   - "context"
 
   static Register from_code(int code) {
     // Always return an X register.
     return Register::Create(code, kXRegSizeInBits);
   }
 
   // End of V8 compatibility section -----------------------
 };
 
-static const bool kSimpleFPAliasing = true;
-static const bool kSimdMaskRegisters = false;
+constexpr bool kSimpleFPAliasing = true;
+constexpr bool kSimdMaskRegisters = false;
 
 struct FPRegister : public CPURegister {
   enum Code {
 #define REGISTER_CODE(R) kCode_##R,
     DOUBLE_REGISTERS(REGISTER_CODE)
 #undef REGISTER_CODE
         kAfterLast,
     kCode_no_reg = -1
   };
 
   static FPRegister Create(int code, int size) {
     return FPRegister(
         CPURegister::Create(code, size, CPURegister::kFPRegister));
   }
 
-  FPRegister() {
-    reg_code = 0;
-    reg_size = 0;
-    reg_type = CPURegister::kNoRegister;
-  }
+  constexpr FPRegister() : CPURegister() {}
 
-  explicit FPRegister(const CPURegister& r) {
-    reg_code = r.reg_code;
-    reg_size = r.reg_size;
-    reg_type = r.reg_type;
-    DCHECK(IsValidOrNone());
-  }
-
-  FPRegister(const FPRegister& r) {  // NOLINT(runtime/explicit)
-    reg_code = r.reg_code;
-    reg_size = r.reg_size;
-    reg_type = r.reg_type;
-    DCHECK(IsValidOrNone());
-  }
+  constexpr explicit FPRegister(const CPURegister& r) : CPURegister(r) {}
 
   bool IsValid() const {
     DCHECK(IsFPRegister() || IsNone());
     return IsValidFPRegister();
   }
 
   static FPRegister SRegFromCode(unsigned code);
   static FPRegister DRegFromCode(unsigned code);
 
   // Start of V8 compatibility section ---------------------
-  static const int kMaxNumRegisters = kNumberOfFPRegisters;
+  static constexpr int kMaxNumRegisters = kNumberOfFPRegisters;
   STATIC_ASSERT(kMaxNumRegisters == Code::kAfterLast);
 
   // Crankshaft can use all the FP registers except:
   //   - d15 which is used to keep the 0 double value
   //   - d30 which is used in crankshaft as a double scratch register
   //   - d31 which is used in the MacroAssembler as a double scratch register
   static FPRegister from_code(int code) {
     // Always return a D register.
     return FPRegister::Create(code, kDRegSizeInBits);
   }
   // End of V8 compatibility section -----------------------
 };
 
 
 STATIC_ASSERT(sizeof(CPURegister) == sizeof(Register));
 STATIC_ASSERT(sizeof(CPURegister) == sizeof(FPRegister));
 
-
-#if defined(ARM64_DEFINE_REG_STATICS)
-#define INITIALIZE_REGISTER(register_class, name, code, size, type)      \
-  const CPURegister init_##register_class##_##name = {code, size, type}; \
-  const register_class& name = *reinterpret_cast<const register_class*>( \
-                                    &init_##register_class##_##name)
-#define ALIAS_REGISTER(register_class, alias, name)                       \
-  const register_class& alias = *reinterpret_cast<const register_class*>( \
-                                     &init_##register_class##_##name)
-#else
-#define INITIALIZE_REGISTER(register_class, name, code, size, type) \
-  extern const register_class& name
+#define DEFINE_REGISTER(register_class, name, code, size, type) \
+  constexpr register_class name { CPURegister(code, size, type) }
 #define ALIAS_REGISTER(register_class, alias, name) \
-  extern const register_class& alias
-#endif  // defined(ARM64_DEFINE_REG_STATICS)
+  constexpr register_class alias = name
 
 // No*Reg is used to indicate an unused argument, or an error case. Note that
 // these all compare equal (using the Is() method). The Register and FPRegister
 // variants are provided for convenience.
-INITIALIZE_REGISTER(Register, NoReg, 0, 0, CPURegister::kNoRegister);
-INITIALIZE_REGISTER(FPRegister, NoFPReg, 0, 0, CPURegister::kNoRegister);
-INITIALIZE_REGISTER(CPURegister, NoCPUReg, 0, 0, CPURegister::kNoRegister);
+DEFINE_REGISTER(Register, NoReg, 0, 0, CPURegister::kNoRegister);
+DEFINE_REGISTER(FPRegister, NoFPReg, 0, 0, CPURegister::kNoRegister);
+DEFINE_REGISTER(CPURegister, NoCPUReg, 0, 0, CPURegister::kNoRegister);
 
 // v8 compatibility.
-INITIALIZE_REGISTER(Register, no_reg, 0, 0, CPURegister::kNoRegister);
+DEFINE_REGISTER(Register, no_reg, 0, 0, CPURegister::kNoRegister);
 
-#define DEFINE_REGISTERS(N)                                                  \
-  INITIALIZE_REGISTER(Register, w##N, N,                                     \
-                      kWRegSizeInBits, CPURegister::kRegister);              \
-  INITIALIZE_REGISTER(Register, x##N, N,                                     \
-                      kXRegSizeInBits, CPURegister::kRegister);
+#define DEFINE_REGISTERS(N)                                                    \
+  DEFINE_REGISTER(Register, w##N, N, kWRegSizeInBits, CPURegister::kRegister); \
+  DEFINE_REGISTER(Register, x##N, N, kXRegSizeInBits, CPURegister::kRegister);
 GENERAL_REGISTER_CODE_LIST(DEFINE_REGISTERS)
 #undef DEFINE_REGISTERS
 
-INITIALIZE_REGISTER(Register, wcsp, kSPRegInternalCode, kWRegSizeInBits,
-                    CPURegister::kRegister);
-INITIALIZE_REGISTER(Register, csp, kSPRegInternalCode, kXRegSizeInBits,
-                    CPURegister::kRegister);
+DEFINE_REGISTER(Register, wcsp, kSPRegInternalCode, kWRegSizeInBits,
+                CPURegister::kRegister);
+DEFINE_REGISTER(Register, csp, kSPRegInternalCode, kXRegSizeInBits,
+                CPURegister::kRegister);
 
-#define DEFINE_FPREGISTERS(N)                                                  \
-  INITIALIZE_REGISTER(FPRegister, s##N, N,                                     \
-                      kSRegSizeInBits, CPURegister::kFPRegister);              \
-  INITIALIZE_REGISTER(FPRegister, d##N, N,                                     \
-                      kDRegSizeInBits, CPURegister::kFPRegister);
+#define DEFINE_FPREGISTERS(N)                           \
+  DEFINE_REGISTER(FPRegister, s##N, N, kSRegSizeInBits, \
+                  CPURegister::kFPRegister);            \
+  DEFINE_REGISTER(FPRegister, d##N, N, kDRegSizeInBits, \
+                  CPURegister::kFPRegister);
 GENERAL_REGISTER_CODE_LIST(DEFINE_FPREGISTERS)
 #undef DEFINE_FPREGISTERS
 
-#undef INITIALIZE_REGISTER
+#undef DEFINE_REGISTER
 
 // Registers aliases.
 ALIAS_REGISTER(Register, ip0, x16);
 ALIAS_REGISTER(Register, ip1, x17);
 ALIAS_REGISTER(Register, wip0, w16);
 ALIAS_REGISTER(Register, wip1, w17);
 // Root register.
 ALIAS_REGISTER(Register, root, x26);
 ALIAS_REGISTER(Register, rr, x26);
 // Context pointer register.
@@ skipping 237 matching lines @@
  private:
   void InitializeHandle(Handle<Object> value);
 
   int64_t value_;
   RelocInfo::Mode rmode_;
 };
 
 
 // -----------------------------------------------------------------------------
 // Operands.
-const int kSmiShift = kSmiTagSize + kSmiShiftSize;
-const uint64_t kSmiShiftMask = (1UL << kSmiShift) - 1;
+constexpr int kSmiShift = kSmiTagSize + kSmiShiftSize;
+constexpr uint64_t kSmiShiftMask = (1UL << kSmiShift) - 1;
 
 // Represents an operand in a machine instruction.
 class Operand {
   // TODO(all): If necessary, study more in details which methods
   // TODO(all): should be inlined or not.
  public:
   // rm, {<shift> {#<shift_amount>}}
   // where <shift> is one of {LSL, LSR, ASR, ROR}.
   //       <shift_amount> is uint6_t.
   // This is allowed to be an implicit constructor because Operand is
@@ skipping 248 matching lines @@
   inline static void deserialization_set_special_target_at(
       Isolate* isolate, Address constant_pool_entry, Code* code,
       Address target);
 
   // This sets the internal reference at the pc.
   inline static void deserialization_set_target_internal_reference_at(
       Isolate* isolate, Address pc, Address target,
       RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE);
 
   // All addresses in the constant pool are the same size as pointers.
-  static const int kSpecialTargetSize = kPointerSize;
+  static constexpr int kSpecialTargetSize = kPointerSize;
 
   // The sizes of the call sequences emitted by MacroAssembler::Call.
   // Wherever possible, use MacroAssembler::CallSize instead of these constants,
   // as it will choose the correct value for a given relocation mode.
   //
   // Without relocation:
   //  movz  temp, #(target & 0x000000000000ffff)
   //  movk  temp, #(target & 0x00000000ffff0000)
   //  movk  temp, #(target & 0x0000ffff00000000)
   //  blr   temp
   //
   // With relocation:
   //  ldr   temp, =target
   //  blr   temp
-  static const int kCallSizeWithoutRelocation = 4 * kInstructionSize;
-  static const int kCallSizeWithRelocation = 2 * kInstructionSize;
+  static constexpr int kCallSizeWithoutRelocation = 4 * kInstructionSize;
+  static constexpr int kCallSizeWithRelocation = 2 * kInstructionSize;
 
   // Size of the generated code in bytes
   uint64_t SizeOfGeneratedCode() const {
     DCHECK((pc_ >= buffer_) && (pc_ < (buffer_ + buffer_size_)));
     return pc_ - buffer_;
   }
 
   // Return the code size generated from label to the current position.
   uint64_t SizeOfCodeGeneratedSince(const Label* label) {
     DCHECK(label->is_bound());
@@ skipping 11 matching lines @@
     DCHECK(size >= 0);
     DCHECK(static_cast<uint64_t>(size) == SizeOfCodeGeneratedSince(label));
   }
 
   // Return the number of instructions generated from label to the
   // current position.
   uint64_t InstructionsGeneratedSince(const Label* label) {
     return SizeOfCodeGeneratedSince(label) / kInstructionSize;
   }
 
-  static const int kPatchDebugBreakSlotAddressOffset =  0;
+  static constexpr int kPatchDebugBreakSlotAddressOffset = 0;
 
   // Number of instructions necessary to be able to later patch it to a call.
-  static const int kDebugBreakSlotInstructions = 5;
-  static const int kDebugBreakSlotLength =
-    kDebugBreakSlotInstructions * kInstructionSize;
+  static constexpr int kDebugBreakSlotInstructions = 5;
+  static constexpr int kDebugBreakSlotLength =
+      kDebugBreakSlotInstructions * kInstructionSize;
 
   // Prevent contant pool emission until EndBlockConstPool is called.
   // Call to this function can be nested but must be followed by an equal
   // number of call to EndBlockConstpool.
   void StartBlockConstPool();
 
   // Resume constant pool emission. Need to be called as many time as
   // StartBlockConstPool to have an effect.
   void EndBlockConstPool();
 
@@ skipping 937 matching lines @@
   // which can at most reach to specified pc.
   bool ShouldEmitVeneer(int max_reachable_pc,
                         int margin = kVeneerDistanceMargin);
   bool ShouldEmitVeneers(int margin = kVeneerDistanceMargin) {
     return ShouldEmitVeneer(unresolved_branches_first_limit(), margin);
   }
 
   // The maximum code size generated for a veneer. Currently one branch
   // instruction. This is for code size checking purposes, and can be extended
   // in the future for example if we decide to add nops between the veneers.
-  static const int kMaxVeneerCodeSize = 1 * kInstructionSize;
+  static constexpr int kMaxVeneerCodeSize = 1 * kInstructionSize;
 
   void RecordVeneerPool(int location_offset, int size);
   // Emits veneers for branches that are approaching their maximum range.
   // If need_protection is true, the veneers are protected by a branch jumping
   // over the code.
   void EmitVeneers(bool force_emit, bool need_protection,
                    int margin = kVeneerDistanceMargin);
   void EmitVeneersGuard() { EmitPoolGuard(); }
   // Checks whether veneers need to be emitted at this point.
   // If force_emit is set, a veneer is generated for *all* unresolved branches.
@@ skipping 132 matching lines @@
 
   // Label helpers.
 
   // Return an offset for a label-referencing instruction, typically a branch.
   int LinkAndGetByteOffsetTo(Label* label);
 
   // This is the same as LinkAndGetByteOffsetTo, but return an offset
   // suitable for fields that take instruction offsets.
   inline int LinkAndGetInstructionOffsetTo(Label* label);
 
-  static const int kStartOfLabelLinkChain = 0;
+  static constexpr int kStartOfLabelLinkChain = 0;
 
   // Verify that a label's link chain is intact.
   void CheckLabelLinkChain(Label const * label);
 
   void RecordLiteral(int64_t imm, unsigned size);
 
   // Postpone the generation of the constant pool for the specified number of
   // instructions.
   void BlockConstPoolFor(int instructions);
 
@@ skipping 40 matching lines @@
   // If a pool needs to be emitted before code generation is finished a branch
   // over the emitted pool will be inserted.
 
   // Constants in the pool may be addresses of functions that gets relocated;
   // if so, a relocation info entry is associated to the constant pool entry.
 
   // Repeated checking whether the constant pool should be emitted is rather
   // expensive. By default we only check again once a number of instructions
   // has been generated. That also means that the sizing of the buffers is not
   // an exact science, and that we rely on some slop to not overrun buffers.
-  static const int kCheckConstPoolInterval = 128;
+  static constexpr int kCheckConstPoolInterval = 128;
 
   // Distance to first use after a which a pool will be emitted. Pool entries
   // are accessed with pc relative load therefore this cannot be more than
   // 1 * MB. Since constant pool emission checks are interval based this value
   // is an approximation.
-  static const int kApproxMaxDistToConstPool = 64 * KB;
+  static constexpr int kApproxMaxDistToConstPool = 64 * KB;
 
   // Number of pool entries after which a pool will be emitted. Since constant
   // pool emission checks are interval based this value is an approximation.
-  static const int kApproxMaxPoolEntryCount = 512;
+  static constexpr int kApproxMaxPoolEntryCount = 512;
 
   // Emission of the constant pool may be blocked in some code sequences.
   int const_pool_blocked_nesting_;  // Block emission if this is not zero.
   int no_const_pool_before_;  // Block emission before this pc offset.
 
   // Emission of the veneer pools may be blocked in some code sequences.
   int veneer_pool_blocked_nesting_;  // Block emission if this is not zero.
 
   // Relocation info generation
   // Each relocation is encoded as a variable size value
-  static const int kMaxRelocSize = RelocInfoWriter::kMaxSize;
+  static constexpr int kMaxRelocSize = RelocInfoWriter::kMaxSize;
   RelocInfoWriter reloc_info_writer;
   // Internal reference positions, required for (potential) patching in
   // GrowBuffer(); contains only those internal references whose labels
   // are already bound.
   std::deque<int> internal_reference_positions_;
 
   // Relocation info records are also used during code generation as temporary
   // containers for constants and code target addresses until they are emitted
   // to the constant pool. These pending relocation info records are temporarily
   // stored in a separate buffer until a constant pool is emitted.
@@ skipping 18 matching lines @@
     DCHECK(recorded_ast_id_.IsNone());
     recorded_ast_id_ = ast_id;
   }
 
   // Code generation
   // The relocation writer's position is at least kGap bytes below the end of
   // the generated instructions. This is so that multi-instruction sequences do
   // not have to check for overflow. The same is true for writes of large
   // relocation info entries, and debug strings encoded in the instruction
   // stream.
-  static const int kGap = 128;
+  static constexpr int kGap = 128;
 
  public:
   class FarBranchInfo {
    public:
     FarBranchInfo(int offset, Label* label)
         : pc_offset_(offset), label_(label) {}
     // Offset of the branch in the code generation buffer.
     int pc_offset_;
     // The label branched to.
     Label* label_;
   };
 
  protected:
   // Information about unresolved (forward) branches.
   // The Assembler is only allowed to delete out-of-date information from here
   // after a label is bound. The MacroAssembler uses this information to
   // generate veneers.
   //
   // The second member gives information about the unresolved branch. The first
   // member of the pair is the maximum offset that the branch can reach in the
   // buffer. The map is sorted according to this reachable offset, allowing to
   // easily check when veneers need to be emitted.
   // Note that the maximum reachable offset (first member of the pairs) should
   // always be positive but has the same type as the return value for
   // pc_offset() for convenience.
   std::multimap<int, FarBranchInfo> unresolved_branches_;
 
   // We generate a veneer for a branch if we reach within this distance of the
   // limit of the range.
-  static const int kVeneerDistanceMargin = 1 * KB;
+  static constexpr int kVeneerDistanceMargin = 1 * KB;
   // The factor of 2 is a finger in the air guess. With a default margin of
   // 1KB, that leaves us an addional 256 instructions to avoid generating a
   // protective branch.
-  static const int kVeneerNoProtectionFactor = 2;
-  static const int kVeneerDistanceCheckMargin =
-    kVeneerNoProtectionFactor * kVeneerDistanceMargin;
+  static constexpr int kVeneerNoProtectionFactor = 2;
+  static constexpr int kVeneerDistanceCheckMargin =
+      kVeneerNoProtectionFactor * kVeneerDistanceMargin;
   int unresolved_branches_first_limit() const {
     DCHECK(!unresolved_branches_.empty());
     return unresolved_branches_.begin()->first;
   }
   // This is similar to next_constant_pool_check_ and helps reduce the overhead
   // of checking for veneer pools.
   // It is maintained to the closest unresolved branch limit minus the maximum
   // veneer margin (or kMaxInt if there are no unresolved branches).
   int next_veneer_pool_check_;
 
@@ skipping 43 matching lines @@
     // Verify we have generated the number of instruction we expected.
     DCHECK((pc_offset() + kGap) == buffer_size_);
     // Verify no relocation information has been emitted.
     DCHECK(IsConstPoolEmpty());
     // Flush the Instruction cache.
     size_t length = buffer_size_ - kGap;
     Assembler::FlushICache(isolate(), buffer_, length);
   }
 
   // See definition of PatchAdrFar() for details.
-  static const int kAdrFarPatchableNNops = 2;
-  static const int kAdrFarPatchableNInstrs = kAdrFarPatchableNNops + 2;
+  static constexpr int kAdrFarPatchableNNops = 2;
+  static constexpr int kAdrFarPatchableNInstrs = kAdrFarPatchableNNops + 2;
   void PatchAdrFar(int64_t target_offset);
 };
 
 
 class EnsureSpace BASE_EMBEDDED {
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBufferSpace();
   }
 };
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_ARM64_ASSEMBLER_ARM64_H_