Index: src/ppc/assembler-ppc.h |
diff --git a/src/ppc/assembler-ppc.h b/src/ppc/assembler-ppc.h |
index d9e64f2acec7188c52e49bd6cddc0c8111bf9a2a..24119a27505819493889cf3626d85b3e1a206902 100644 |
--- a/src/ppc/assembler-ppc.h |
+++ b/src/ppc/assembler-ppc.h |
@@ -149,16 +149,16 @@ struct Register { |
kCode_no_reg = -1 |
}; |
- static const int kNumRegisters = Code::kAfterLast; |
+ static constexpr int kNumRegisters = Code::kAfterLast; |
#define REGISTER_COUNT(R) 1 + |
- static const int kNumAllocatable = |
- ALLOCATABLE_GENERAL_REGISTERS(REGISTER_COUNT)0; |
+ static constexpr int kNumAllocatable = |
+ ALLOCATABLE_GENERAL_REGISTERS(REGISTER_COUNT) 0; |
#undef REGISTER_COUNT |
#define REGISTER_BIT(R) 1 << kCode_##R | |
- static const RegList kAllocatable = |
- ALLOCATABLE_GENERAL_REGISTERS(REGISTER_BIT)0; |
+ static constexpr RegList kAllocatable = |
+ ALLOCATABLE_GENERAL_REGISTERS(REGISTER_BIT) 0; |
#undef REGISTER_BIT |
static Register from_code(int code) { |
@@ -183,30 +183,30 @@ struct Register { |
} |
#if V8_TARGET_LITTLE_ENDIAN |
- static const int kMantissaOffset = 0; |
- static const int kExponentOffset = 4; |
+ static constexpr int kMantissaOffset = 0; |
+ static constexpr int kExponentOffset = 4; |
#else |
- static const int kMantissaOffset = 4; |
- static const int kExponentOffset = 0; |
+ static constexpr int kMantissaOffset = 4; |
+ static constexpr int kExponentOffset = 0; |
#endif |
// Unfortunately we can't make this private in a struct. |
int reg_code; |
}; |
-#define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; |
-GENERAL_REGISTERS(DECLARE_REGISTER) |
-#undef DECLARE_REGISTER |
-const Register no_reg = {Register::kCode_no_reg}; |
+#define DEFINE_REGISTER(R) constexpr Register R = {Register::kCode_##R}; |
+GENERAL_REGISTERS(DEFINE_REGISTER) |
+#undef DEFINE_REGISTER |
+constexpr Register no_reg = {Register::kCode_no_reg}; |
// Aliases |
-const Register kLithiumScratch = r11; // lithium scratch. |
-const Register kConstantPoolRegister = r28; // Constant pool. |
-const Register kRootRegister = r29; // Roots array pointer. |
-const Register cp = r30; // JavaScript context pointer. |
+constexpr Register kLithiumScratch = r11; // lithium scratch. |
+constexpr Register kConstantPoolRegister = r28; // Constant pool. |
+constexpr Register kRootRegister = r29; // Roots array pointer. |
+constexpr Register cp = r30; // JavaScript context pointer. |
-static const bool kSimpleFPAliasing = true; |
-static const bool kSimdMaskRegisters = false; |
+constexpr bool kSimpleFPAliasing = true; |
+constexpr bool kSimdMaskRegisters = false; |
// Double word FP register. |
struct DoubleRegister { |
@@ -218,8 +218,8 @@ struct DoubleRegister { |
kCode_no_reg = -1 |
}; |
- static const int kNumRegisters = Code::kAfterLast; |
- static const int kMaxNumRegisters = kNumRegisters; |
+ static constexpr int kNumRegisters = Code::kAfterLast; |
+ static constexpr int kMaxNumRegisters = kNumRegisters; |
bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } |
bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } |
@@ -245,19 +245,16 @@ typedef DoubleRegister FloatRegister; |
// TODO(ppc) Define SIMD registers. |
typedef DoubleRegister Simd128Register; |
-#define DECLARE_REGISTER(R) \ |
- const DoubleRegister R = {DoubleRegister::kCode_##R}; |
-DOUBLE_REGISTERS(DECLARE_REGISTER) |
-#undef DECLARE_REGISTER |
-const Register no_dreg = {Register::kCode_no_reg}; |
+#define DEFINE_REGISTER(R) \ |
+ constexpr DoubleRegister R = {DoubleRegister::kCode_##R}; |
+DOUBLE_REGISTERS(DEFINE_REGISTER) |
+#undef DEFINE_REGISTER |
+constexpr Register no_dreg = {Register::kCode_no_reg}; |
-// Aliases for double registers. Defined using #define instead of |
-// "static const DoubleRegister&" because Clang complains otherwise when a |
-// compilation unit that includes this header doesn't use the variables. |
-#define kFirstCalleeSavedDoubleReg d14 |
-#define kLastCalleeSavedDoubleReg d31 |
-#define kDoubleRegZero d14 |
-#define kScratchDoubleReg d13 |
+constexpr DoubleRegister kFirstCalleeSavedDoubleReg = d14; |
+constexpr DoubleRegister kLastCalleeSavedDoubleReg = d31; |
+constexpr DoubleRegister kDoubleRegZero = d14; |
+constexpr DoubleRegister kScratchDoubleReg = d13; |
Register ToRegister(int num); |
@@ -278,25 +275,24 @@ struct CRegister { |
int reg_code; |
}; |
+constexpr CRegister no_creg = {-1}; |
-const CRegister no_creg = {-1}; |
- |
-const CRegister cr0 = {0}; |
-const CRegister cr1 = {1}; |
-const CRegister cr2 = {2}; |
-const CRegister cr3 = {3}; |
-const CRegister cr4 = {4}; |
-const CRegister cr5 = {5}; |
-const CRegister cr6 = {6}; |
-const CRegister cr7 = {7}; |
+constexpr CRegister cr0 = {0}; |
+constexpr CRegister cr1 = {1}; |
+constexpr CRegister cr2 = {2}; |
+constexpr CRegister cr3 = {3}; |
+constexpr CRegister cr4 = {4}; |
+constexpr CRegister cr5 = {5}; |
+constexpr CRegister cr6 = {6}; |
+constexpr CRegister cr7 = {7}; |
// ----------------------------------------------------------------------------- |
// Machine instruction Operands |
#if V8_TARGET_ARCH_PPC64 |
-const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64; |
+constexpr RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64; |
#else |
-const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32; |
+constexpr RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32; |
#endif |
// Class Operand represents a shifter operand in data processing instructions |
@@ -495,7 +491,7 @@ class Assembler : public AssemblerBase { |
RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE); |
// Size of an instruction. |
- static const int kInstrSize = sizeof(Instr); |
+ static constexpr int kInstrSize = sizeof(Instr); |
// Here we are patching the address in the LUI/ORI instruction pair. |
// These values are used in the serialization process and must be zero for |
@@ -503,25 +499,25 @@ class Assembler : public AssemblerBase { |
// are split across two consecutive instructions and don't exist separately |
// in the code, so the serializer should not step forwards in memory after |
// a target is resolved and written. |
- static const int kSpecialTargetSize = 0; |
+ static constexpr int kSpecialTargetSize = 0; |
// Number of instructions to load an address via a mov sequence. |
#if V8_TARGET_ARCH_PPC64 |
- static const int kMovInstructionsConstantPool = 1; |
- static const int kMovInstructionsNoConstantPool = 5; |
+ static constexpr int kMovInstructionsConstantPool = 1; |
+ static constexpr int kMovInstructionsNoConstantPool = 5; |
#if defined(V8_PPC_TAGGING_OPT) |
- static const int kTaggedLoadInstructions = 1; |
+ static constexpr int kTaggedLoadInstructions = 1; |
#else |
- static const int kTaggedLoadInstructions = 2; |
+ static constexpr int kTaggedLoadInstructions = 2; |
#endif |
#else |
- static const int kMovInstructionsConstantPool = 1; |
- static const int kMovInstructionsNoConstantPool = 2; |
- static const int kTaggedLoadInstructions = 1; |
+ static constexpr int kMovInstructionsConstantPool = 1; |
+ static constexpr int kMovInstructionsNoConstantPool = 2; |
+ static constexpr int kTaggedLoadInstructions = 1; |
#endif |
- static const int kMovInstructions = FLAG_enable_embedded_constant_pool |
- ? kMovInstructionsConstantPool |
- : kMovInstructionsNoConstantPool; |
+ static constexpr int kMovInstructions = FLAG_enable_embedded_constant_pool |
+ ? kMovInstructionsConstantPool |
+ : kMovInstructionsNoConstantPool; |
// Distance between the instruction referring to the address of the call |
// target and the return address. |
@@ -531,7 +527,7 @@ class Assembler : public AssemblerBase { |
// mtlr r8 |
// blrl |
// @ return address |
- static const int kCallTargetAddressOffset = |
+ static constexpr int kCallTargetAddressOffset = |
(kMovInstructions + 2) * kInstrSize; |
// Distance between start of patched debug break slot and the emitted address |
@@ -540,13 +536,13 @@ class Assembler : public AssemblerBase { |
// mov r0, <address> |
// mtlr r0 |
// blrl |
- static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; |
+ static constexpr int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; |
// This is the length of the code sequence from SetDebugBreakAtSlot() |
// FIXED_SEQUENCE |
- static const int kDebugBreakSlotInstructions = |
+ static constexpr int kDebugBreakSlotInstructions = |
kMovInstructionsNoConstantPool + 2; |
- static const int kDebugBreakSlotLength = |
+ static constexpr int kDebugBreakSlotLength = |
kDebugBreakSlotInstructions * kInstrSize; |
static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) { |
@@ -1379,7 +1375,7 @@ class Assembler : public AssemblerBase { |
// the generated instructions. This is so that multi-instruction sequences do |
// not have to check for overflow. The same is true for writes of large |
// relocation info entries. |
- static const int kGap = 32; |
+ static constexpr int kGap = 32; |
// Repeated checking whether the trampoline pool should be emitted is rather |
// expensive. By default we only check again once a number of instructions |
@@ -1395,7 +1391,7 @@ class Assembler : public AssemblerBase { |
// Relocation info generation |
// Each relocation is encoded as a variable size value |
- static const int kMaxRelocSize = RelocInfoWriter::kMaxSize; |
+ static constexpr int kMaxRelocSize = RelocInfoWriter::kMaxSize; |
RelocInfoWriter reloc_info_writer; |
std::vector<DeferredRelocInfo> relocations_; |
@@ -1473,10 +1469,10 @@ class Assembler : public AssemblerBase { |
// trigger different mode of branch instruction generation, where we |
// no longer use a single branch instruction. |
bool trampoline_emitted_; |
- static const int kTrampolineSlotsSize = kInstrSize; |
- static const int kMaxCondBranchReach = (1 << (16 - 1)) - 1; |
- static const int kMaxBlockTrampolineSectionSize = 64 * kInstrSize; |
- static const int kInvalidSlotPos = -1; |
+ static constexpr int kTrampolineSlotsSize = kInstrSize; |
+ static constexpr int kMaxCondBranchReach = (1 << (16 - 1)) - 1; |
+ static constexpr int kMaxBlockTrampolineSectionSize = 64 * kInstrSize; |
+ static constexpr int kInvalidSlotPos = -1; |
Trampoline trampoline_; |
bool internal_trampoline_exception_; |