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Issue 2732273003: Disentangle assembler from isolate. (Closed)
Patch Set: Address feedback. Created 3 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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183 reinterpret_cast<intptr_t>((Assembler::target_address_at(pc_, host_)))); 183 reinterpret_cast<intptr_t>((Assembler::target_address_at(pc_, host_))));
184 } 184 }
185 185
186 uint32_t RelocInfo::wasm_function_table_size_reference() { 186 uint32_t RelocInfo::wasm_function_table_size_reference() {
187 DCHECK(IsWasmFunctionTableSizeReference(rmode_)); 187 DCHECK(IsWasmFunctionTableSizeReference(rmode_));
188 return static_cast<uint32_t>( 188 return static_cast<uint32_t>(
189 reinterpret_cast<intptr_t>((Assembler::target_address_at(pc_, host_)))); 189 reinterpret_cast<intptr_t>((Assembler::target_address_at(pc_, host_))));
190 } 190 }
191 191
192 void RelocInfo::unchecked_update_wasm_memory_reference( 192 void RelocInfo::unchecked_update_wasm_memory_reference(
193 Address address, ICacheFlushMode flush_mode) { 193 Isolate* isolate, Address address, ICacheFlushMode flush_mode) {
194 Assembler::set_target_address_at(isolate_, pc_, host_, address, flush_mode); 194 Assembler::set_target_address_at(isolate, pc_, host_, address, flush_mode);
195 } 195 }
196 196
197 void RelocInfo::unchecked_update_wasm_size(uint32_t size, 197 void RelocInfo::unchecked_update_wasm_size(Isolate* isolate, uint32_t size,
198 ICacheFlushMode flush_mode) { 198 ICacheFlushMode flush_mode) {
199 Assembler::set_target_address_at(isolate_, pc_, host_, 199 Assembler::set_target_address_at(isolate, pc_, host_,
200 reinterpret_cast<Address>(size), flush_mode); 200 reinterpret_cast<Address>(size), flush_mode);
201 } 201 }
202 202
203 // ----------------------------------------------------------------------------- 203 // -----------------------------------------------------------------------------
204 // Implementation of Operand and MemOperand. 204 // Implementation of Operand and MemOperand.
205 // See assembler-mips-inl.h for inlined constructors. 205 // See assembler-mips-inl.h for inlined constructors.
206 206
207 Operand::Operand(Handle<Object> handle) { 207 Operand::Operand(Handle<Object> handle) {
208 AllowDeferredHandleDereference using_raw_address; 208 AllowDeferredHandleDereference using_raw_address;
209 rm_ = no_reg; 209 rm_ = no_reg;
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262 (kNegOffset & kImm16Mask); // NOLINT 262 (kNegOffset & kImm16Mask); // NOLINT
263 263
264 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) | 264 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) |
265 (kNegOffset & kImm16Mask); // NOLINT 265 (kNegOffset & kImm16Mask); // NOLINT
266 // A mask for the Rt register for push, pop, lw, sw instructions. 266 // A mask for the Rt register for push, pop, lw, sw instructions.
267 const Instr kRtMask = kRtFieldMask; 267 const Instr kRtMask = kRtFieldMask;
268 const Instr kLwSwInstrTypeMask = 0xffe00000; 268 const Instr kLwSwInstrTypeMask = 0xffe00000;
269 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask; 269 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask;
270 const Instr kLwSwOffsetMask = kImm16Mask; 270 const Instr kLwSwOffsetMask = kImm16Mask;
271 271
272 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) 272 Assembler::Assembler(IsolateData isolate_data, void* buffer, int buffer_size)
273 : AssemblerBase(isolate, buffer, buffer_size), 273 : AssemblerBase(isolate_data, buffer, buffer_size),
274 recorded_ast_id_(TypeFeedbackId::None()) { 274 recorded_ast_id_(TypeFeedbackId::None()) {
275 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); 275 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_);
276 276
277 last_trampoline_pool_end_ = 0; 277 last_trampoline_pool_end_ = 0;
278 no_trampoline_pool_before_ = 0; 278 no_trampoline_pool_before_ = 0;
279 trampoline_pool_blocked_nesting_ = 0; 279 trampoline_pool_blocked_nesting_ = 0;
280 // We leave space (16 * kTrampolineSlotsSize) 280 // We leave space (16 * kTrampolineSlotsSize)
281 // for BlockTrampolinePoolScope buffer. 281 // for BlockTrampolinePoolScope buffer.
282 next_buffer_check_ = FLAG_force_long_branches 282 next_buffer_check_ = FLAG_force_long_branches
283 ? kMaxInt : kMaxBranchOffset - kTrampolineSlotsSize * 16; 283 ? kMaxInt : kMaxBranchOffset - kTrampolineSlotsSize * 16;
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3346 unbound_labels_count_++; 3346 unbound_labels_count_++;
3347 internal_reference_positions_.insert(label->pos()); 3347 internal_reference_positions_.insert(label->pos());
3348 } 3348 }
3349 RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE); 3349 RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE);
3350 EmitHelper(data); 3350 EmitHelper(data);
3351 } 3351 }
3352 3352
3353 3353
3354 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) { 3354 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
3355 // We do not try to reuse pool constants. 3355 // We do not try to reuse pool constants.
3356 RelocInfo rinfo(isolate(), pc_, rmode, data, NULL); 3356 RelocInfo rinfo(pc_, rmode, data, NULL);
3357 if (rmode >= RelocInfo::COMMENT && 3357 if (rmode >= RelocInfo::COMMENT &&
3358 rmode <= RelocInfo::DEBUG_BREAK_SLOT_AT_TAIL_CALL) { 3358 rmode <= RelocInfo::DEBUG_BREAK_SLOT_AT_TAIL_CALL) {
3359 // Adjust code for new modes. 3359 // Adjust code for new modes.
3360 DCHECK(RelocInfo::IsDebugBreakSlot(rmode) || RelocInfo::IsComment(rmode)); 3360 DCHECK(RelocInfo::IsDebugBreakSlot(rmode) || RelocInfo::IsComment(rmode));
3361 // These modes do not need an entry in the constant pool. 3361 // These modes do not need an entry in the constant pool.
3362 } 3362 }
3363 if (!RelocInfo::IsNone(rinfo.rmode())) { 3363 if (!RelocInfo::IsNone(rinfo.rmode())) {
3364 // Don't record external references unless the heap will be serialized. 3364 // Don't record external references unless the heap will be serialized.
3365 if (rmode == RelocInfo::EXTERNAL_REFERENCE && 3365 if (rmode == RelocInfo::EXTERNAL_REFERENCE &&
3366 !serializer_enabled() && !emit_debug_code()) { 3366 !serializer_enabled() && !emit_debug_code()) {
3367 return; 3367 return;
3368 } 3368 }
3369 DCHECK(buffer_space() >= kMaxRelocSize); // Too late to grow buffer here. 3369 DCHECK(buffer_space() >= kMaxRelocSize); // Too late to grow buffer here.
3370 if (rmode == RelocInfo::CODE_TARGET_WITH_ID) { 3370 if (rmode == RelocInfo::CODE_TARGET_WITH_ID) {
3371 RelocInfo reloc_info_with_ast_id(isolate(), pc_, rmode, 3371 RelocInfo reloc_info_with_ast_id(pc_, rmode, RecordedAstId().ToInt(),
3372 RecordedAstId().ToInt(), NULL); 3372 NULL);
3373 ClearRecordedAstId(); 3373 ClearRecordedAstId();
3374 reloc_info_writer.Write(&reloc_info_with_ast_id); 3374 reloc_info_writer.Write(&reloc_info_with_ast_id);
3375 } else { 3375 } else {
3376 reloc_info_writer.Write(&rinfo); 3376 reloc_info_writer.Write(&rinfo);
3377 } 3377 }
3378 } 3378 }
3379 } 3379 }
3380 3380
3381 3381
3382 void Assembler::BlockTrampolinePoolFor(int instructions) { 3382 void Assembler::BlockTrampolinePoolFor(int instructions) {
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3525 3525
3526 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { 3526 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
3527 Assembler::FlushICache(isolate, pc, 4 * Assembler::kInstrSize); 3527 Assembler::FlushICache(isolate, pc, 4 * Assembler::kInstrSize);
3528 } 3528 }
3529 } 3529 }
3530 3530
3531 } // namespace internal 3531 } // namespace internal
3532 } // namespace v8 3532 } // namespace v8
3533 3533
3534 #endif // V8_TARGET_ARCH_MIPS64 3534 #endif // V8_TARGET_ARCH_MIPS64
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