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Side by Side Diff: src/mips64/assembler-mips64-inl.h

Issue 2732273003: Disentangle assembler from isolate. (Closed)
Patch Set: Address feedback. Created 3 years, 9 months ago
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1 1
2 // Copyright (c) 1994-2006 Sun Microsystems Inc. 2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved. 3 // All Rights Reserved.
4 // 4 //
5 // Redistribution and use in source and binary forms, with or without 5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are 6 // modification, are permitted provided that the following conditions are
7 // met: 7 // met:
8 // 8 //
9 // - Redistributions of source code must retain the above copyright notice, 9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer. 10 // this list of conditions and the following disclaimer.
(...skipping 182 matching lines...) Expand 10 before | Expand all | Expand 10 after
193 Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) { 193 Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) {
194 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 194 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
195 return Handle<HeapObject>( 195 return Handle<HeapObject>(
196 reinterpret_cast<HeapObject**>(Assembler::target_address_at(pc_, host_))); 196 reinterpret_cast<HeapObject**>(Assembler::target_address_at(pc_, host_)));
197 } 197 }
198 198
199 void RelocInfo::set_target_object(HeapObject* target, 199 void RelocInfo::set_target_object(HeapObject* target,
200 WriteBarrierMode write_barrier_mode, 200 WriteBarrierMode write_barrier_mode,
201 ICacheFlushMode icache_flush_mode) { 201 ICacheFlushMode icache_flush_mode) {
202 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 202 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
203 Assembler::set_target_address_at(isolate_, pc_, host_, 203 Assembler::set_target_address_at(target->GetIsolate(), pc_, host_,
204 reinterpret_cast<Address>(target), 204 reinterpret_cast<Address>(target),
205 icache_flush_mode); 205 icache_flush_mode);
206 if (write_barrier_mode == UPDATE_WRITE_BARRIER && 206 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
207 host() != NULL && 207 host() != NULL &&
208 target->IsHeapObject()) { 208 target->IsHeapObject()) {
209 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( 209 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
210 host(), this, HeapObject::cast(target)); 210 host(), this, HeapObject::cast(target));
211 host()->GetHeap()->RecordWriteIntoCode(host(), this, target); 211 host()->GetHeap()->RecordWriteIntoCode(host(), this, target);
212 } 212 }
213 } 213 }
(...skipping 25 matching lines...) Expand all
239 DCHECK(rmode_ == INTERNAL_REFERENCE || rmode_ == INTERNAL_REFERENCE_ENCODED); 239 DCHECK(rmode_ == INTERNAL_REFERENCE || rmode_ == INTERNAL_REFERENCE_ENCODED);
240 return reinterpret_cast<Address>(pc_); 240 return reinterpret_cast<Address>(pc_);
241 } 241 }
242 242
243 243
244 Address RelocInfo::target_runtime_entry(Assembler* origin) { 244 Address RelocInfo::target_runtime_entry(Assembler* origin) {
245 DCHECK(IsRuntimeEntry(rmode_)); 245 DCHECK(IsRuntimeEntry(rmode_));
246 return target_address(); 246 return target_address();
247 } 247 }
248 248
249 249 void RelocInfo::set_target_runtime_entry(Isolate* isolate, Address target,
250 void RelocInfo::set_target_runtime_entry(Address target,
251 WriteBarrierMode write_barrier_mode, 250 WriteBarrierMode write_barrier_mode,
252 ICacheFlushMode icache_flush_mode) { 251 ICacheFlushMode icache_flush_mode) {
253 DCHECK(IsRuntimeEntry(rmode_)); 252 DCHECK(IsRuntimeEntry(rmode_));
254 if (target_address() != target) 253 if (target_address() != target)
255 set_target_address(target, write_barrier_mode, icache_flush_mode); 254 set_target_address(isolate, target, write_barrier_mode, icache_flush_mode);
256 } 255 }
257 256
258 257
259 Handle<Cell> RelocInfo::target_cell_handle() { 258 Handle<Cell> RelocInfo::target_cell_handle() {
260 DCHECK(rmode_ == RelocInfo::CELL); 259 DCHECK(rmode_ == RelocInfo::CELL);
261 Address address = Memory::Address_at(pc_); 260 Address address = Memory::Address_at(pc_);
262 return Handle<Cell>(reinterpret_cast<Cell**>(address)); 261 return Handle<Cell>(reinterpret_cast<Cell**>(address));
263 } 262 }
264 263
265 264
(...skipping 27 matching lines...) Expand all
293 Code* RelocInfo::code_age_stub() { 292 Code* RelocInfo::code_age_stub() {
294 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); 293 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
295 return Code::GetCodeFromTargetAddress( 294 return Code::GetCodeFromTargetAddress(
296 Assembler::target_address_at(pc_ + Assembler::kInstrSize, host_)); 295 Assembler::target_address_at(pc_ + Assembler::kInstrSize, host_));
297 } 296 }
298 297
299 298
300 void RelocInfo::set_code_age_stub(Code* stub, 299 void RelocInfo::set_code_age_stub(Code* stub,
301 ICacheFlushMode icache_flush_mode) { 300 ICacheFlushMode icache_flush_mode) {
302 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); 301 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
303 Assembler::set_target_address_at(isolate_, pc_ + Assembler::kInstrSize, host_, 302 Assembler::set_target_address_at(stub->GetIsolate(),
303 pc_ + Assembler::kInstrSize, host_,
304 stub->instruction_start()); 304 stub->instruction_start());
305 } 305 }
306 306
307 307
308 Address RelocInfo::debug_call_address() { 308 Address RelocInfo::debug_call_address() {
309 // The pc_ offset of 0 assumes patched debug break slot or return 309 // The pc_ offset of 0 assumes patched debug break slot or return
310 // sequence. 310 // sequence.
311 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); 311 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
312 return Assembler::target_address_at(pc_, host_); 312 return Assembler::target_address_at(pc_, host_);
313 } 313 }
314 314
315 315 void RelocInfo::set_debug_call_address(Isolate* isolate, Address target) {
316 void RelocInfo::set_debug_call_address(Address target) {
317 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); 316 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
318 // The pc_ offset of 0 assumes patched debug break slot or return 317 // The pc_ offset of 0 assumes patched debug break slot or return
319 // sequence. 318 // sequence.
320 Assembler::set_target_address_at(isolate_, pc_, host_, target); 319 Assembler::set_target_address_at(isolate, pc_, host_, target);
321 if (host() != NULL) { 320 if (host() != NULL) {
322 Code* target_code = Code::GetCodeFromTargetAddress(target); 321 Code* target_code = Code::GetCodeFromTargetAddress(target);
323 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(host(), this, 322 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(host(), this,
324 target_code); 323 target_code);
325 } 324 }
326 } 325 }
327 326
328 327 void RelocInfo::WipeOut(Isolate* isolate) {
329 void RelocInfo::WipeOut() {
330 DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) || 328 DCHECK(IsEmbeddedObject(rmode_) || IsCodeTarget(rmode_) ||
331 IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) || 329 IsRuntimeEntry(rmode_) || IsExternalReference(rmode_) ||
332 IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)); 330 IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_));
333 if (IsInternalReference(rmode_)) { 331 if (IsInternalReference(rmode_)) {
334 Memory::Address_at(pc_) = NULL; 332 Memory::Address_at(pc_) = NULL;
335 } else if (IsInternalReferenceEncoded(rmode_)) { 333 } else if (IsInternalReferenceEncoded(rmode_)) {
336 Assembler::set_target_internal_reference_encoded_at(pc_, nullptr); 334 Assembler::set_target_internal_reference_encoded_at(pc_, nullptr);
337 } else { 335 } else {
338 Assembler::set_target_address_at(isolate_, pc_, host_, NULL); 336 Assembler::set_target_address_at(isolate, pc_, host_, NULL);
339 } 337 }
340 } 338 }
341 339
342 template <typename ObjectVisitor> 340 template <typename ObjectVisitor>
343 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) { 341 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
344 RelocInfo::Mode mode = rmode(); 342 RelocInfo::Mode mode = rmode();
345 if (mode == RelocInfo::EMBEDDED_OBJECT) { 343 if (mode == RelocInfo::EMBEDDED_OBJECT) {
346 visitor->VisitEmbeddedPointer(this); 344 visitor->VisitEmbeddedPointer(this);
347 } else if (RelocInfo::IsCodeTarget(mode)) { 345 } else if (RelocInfo::IsCodeTarget(mode)) {
348 visitor->VisitCodeTarget(this); 346 visitor->VisitCodeTarget(this);
(...skipping 121 matching lines...) Expand 10 before | Expand all | Expand 10 after
470 void Assembler::emit(uint64_t data) { 468 void Assembler::emit(uint64_t data) {
471 CheckForEmitInForbiddenSlot(); 469 CheckForEmitInForbiddenSlot();
472 EmitHelper(data); 470 EmitHelper(data);
473 } 471 }
474 472
475 473
476 } // namespace internal 474 } // namespace internal
477 } // namespace v8 475 } // namespace v8
478 476
479 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ 477 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_
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