Disentangle assembler from isolate.

src/arm64/assembler-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
@@ skipping 181 matching lines @@
   DCHECK(IsWasmGlobalReference(rmode_));
   return Memory::Address_at(Assembler::target_pointer_address_at(pc_));
 }
 
 uint32_t RelocInfo::wasm_function_table_size_reference() {
   DCHECK(IsWasmFunctionTableSizeReference(rmode_));
   return Memory::uint32_at(Assembler::target_pointer_address_at(pc_));
 }
 
 void RelocInfo::unchecked_update_wasm_memory_reference(
-    Address address, ICacheFlushMode flush_mode) {
-  Assembler::set_target_address_at(isolate_, pc_, host_, address, flush_mode);
+    Isolate* isolate, Address address, ICacheFlushMode flush_mode) {
+  Assembler::set_target_address_at(isolate, pc_, host_, address, flush_mode);
 }
 
-void RelocInfo::unchecked_update_wasm_size(uint32_t size,
+void RelocInfo::unchecked_update_wasm_size(Isolate* isolate, uint32_t size,
                                            ICacheFlushMode flush_mode) {
   Memory::uint32_at(Assembler::target_pointer_address_at(pc_)) = size;
   // No icache flushing needed, see comment in set_target_address_at.
 }
 
 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2,
                                               Register reg3, Register reg4) {
   CPURegList regs(reg1, reg2, reg3, reg4);
   const RegisterConfiguration* config = RegisterConfiguration::Crankshaft();
   for (int i = 0; i < config->num_allocatable_double_registers(); ++i) {
@@ skipping 304 matching lines @@
     std::pair<SharedEntriesIterator, SharedEntriesIterator> range;
     uint64_t data = value_it->first;
     range = shared_entries_.equal_range(data);
     SharedEntriesIterator offset_it;
     // Iterate through the offsets of a given key.
     for (offset_it = range.first; offset_it != range.second; offset_it++) {
       Instruction* instr = assm_->InstructionAt(offset_it->second);
 
       // Instruction to patch must be 'ldr rd, [pc, #offset]' with offset == 0.
       DCHECK(instr->IsLdrLiteral() && instr->ImmLLiteral() == 0);
-      instr->SetImmPCOffsetTarget(assm_->isolate(), assm_->pc());
+      instr->SetImmPCOffsetTarget(assm_->isolate_data(), assm_->pc());
     }
     assm_->dc64(data);
   }
   shared_entries_.clear();
   shared_entries_count = 0;
 
   // Emit unique entries.
   std::vector<std::pair<uint64_t, int> >::const_iterator unique_it;
   for (unique_it = unique_entries_.begin();
        unique_it != unique_entries_.end();
        unique_it++) {
     Instruction* instr = assm_->InstructionAt(unique_it->second);
 
     // Instruction to patch must be 'ldr rd, [pc, #offset]' with offset == 0.
     DCHECK(instr->IsLdrLiteral() && instr->ImmLLiteral() == 0);
-    instr->SetImmPCOffsetTarget(assm_->isolate(), assm_->pc());
+    instr->SetImmPCOffsetTarget(assm_->isolate_data(), assm_->pc());
     assm_->dc64(unique_it->first);
   }
   unique_entries_.clear();
   first_use_ = -1;
 }
 
 
 // Assembler
-Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
-    : AssemblerBase(isolate, buffer, buffer_size),
+Assembler::Assembler(IsolateData isolate_data, void* buffer, int buffer_size)
+    : AssemblerBase(isolate_data, buffer, buffer_size),
       constpool_(this),
       recorded_ast_id_(TypeFeedbackId::None()),
       unresolved_branches_() {
   const_pool_blocked_nesting_ = 0;
   veneer_pool_blocked_nesting_ = 0;
   Reset();
 }
 
 
 Assembler::~Assembler() {
@@ skipping 100 matching lines @@
       // It is also the last instruction in the chain, so it is the only branch
       // currently referring to this label.
       label->Unuse();
     } else {
       label->link_to(
           static_cast<int>(reinterpret_cast<byte*>(next_link) - buffer_));
     }
 
   } else if (branch == next_link) {
     // The branch is the last (but not also the first) instruction in the chain.
-    prev_link->SetImmPCOffsetTarget(isolate(), prev_link);
+    prev_link->SetImmPCOffsetTarget(isolate_data(), prev_link);
 
   } else {
     // The branch is in the middle of the chain.
     if (prev_link->IsTargetInImmPCOffsetRange(next_link)) {
-      prev_link->SetImmPCOffsetTarget(isolate(), next_link);
+      prev_link->SetImmPCOffsetTarget(isolate_data(), next_link);
     } else if (label_veneer != NULL) {
       // Use the veneer for all previous links in the chain.
-      prev_link->SetImmPCOffsetTarget(isolate(), prev_link);
+      prev_link->SetImmPCOffsetTarget(isolate_data(), prev_link);
 
       end_of_chain = false;
       link = next_link;
       while (!end_of_chain) {
         next_link = link->ImmPCOffsetTarget();
         end_of_chain = (link == next_link);
-        link->SetImmPCOffsetTarget(isolate(), label_veneer);
+        link->SetImmPCOffsetTarget(isolate_data(), label_veneer);
         link = next_link;
       }
     } else {
       // The assert below will fire.
       // Some other work could be attempted to fix up the chain, but it would be
       // rather complicated. If we crash here, we may want to consider using an
       // other mechanism than a chain of branches.
       //
       // Note that this situation currently should not happen, as we always call
       // this function with a veneer to the target label.
@@ skipping 50 matching lines @@
     DCHECK(linkoffset < pc_offset());
     DCHECK((linkoffset > prevlinkoffset) ||
            (linkoffset - prevlinkoffset == kStartOfLabelLinkChain));
     DCHECK(prevlinkoffset >= 0);
 
     // Update the link to point to the label.
     if (link->IsUnresolvedInternalReference()) {
       // Internal references do not get patched to an instruction but directly
       // to an address.
       internal_reference_positions_.push_back(linkoffset);
-      PatchingAssembler patcher(isolate(), link, 2);
+      PatchingAssembler patcher(isolate_data(), reinterpret_cast<byte*>(link),
+                                2);
       patcher.dc64(reinterpret_cast<uintptr_t>(pc_));
     } else {
-      link->SetImmPCOffsetTarget(isolate(),
+      link->SetImmPCOffsetTarget(isolate_data(),
                                  reinterpret_cast<Instruction*>(pc_));
     }
 
     // Link the label to the previous link in the chain.
     if (linkoffset - prevlinkoffset == kStartOfLabelLinkChain) {
       // We hit kStartOfLabelLinkChain, so the chain is fully processed.
       label->Unuse();
     } else {
       // Update the label for the next iteration.
       label->link_to(prevlinkoffset);
@@ skipping 2163 matching lines @@
     intptr_t* p = reinterpret_cast<intptr_t*>(buffer_ + pos);
     *p += pc_delta;
   }
 
   // Pending relocation entries are also relative, no need to relocate.
 }
 
 
 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
   // We do not try to reuse pool constants.
-  RelocInfo rinfo(isolate(), reinterpret_cast<byte*>(pc_), rmode, data, NULL);
+  RelocInfo rinfo(reinterpret_cast<byte*>(pc_), rmode, data, NULL);
   if (((rmode >= RelocInfo::COMMENT) &&
        (rmode <= RelocInfo::DEBUG_BREAK_SLOT_AT_TAIL_CALL)) ||
       (rmode == RelocInfo::INTERNAL_REFERENCE) ||
       (rmode == RelocInfo::CONST_POOL) || (rmode == RelocInfo::VENEER_POOL) ||
       (rmode == RelocInfo::DEOPT_SCRIPT_OFFSET) ||
       (rmode == RelocInfo::DEOPT_INLINING_ID) ||
       (rmode == RelocInfo::DEOPT_REASON) || (rmode == RelocInfo::DEOPT_ID)) {
     // Adjust code for new modes.
     DCHECK(RelocInfo::IsDebugBreakSlot(rmode) || RelocInfo::IsComment(rmode) ||
            RelocInfo::IsDeoptReason(rmode) || RelocInfo::IsDeoptId(rmode) ||
            RelocInfo::IsDeoptPosition(rmode) ||
            RelocInfo::IsInternalReference(rmode) ||
            RelocInfo::IsConstPool(rmode) || RelocInfo::IsVeneerPool(rmode));
     // These modes do not need an entry in the constant pool.
   } else {
     constpool_.RecordEntry(data, rmode);
     // Make sure the constant pool is not emitted in place of the next
     // instruction for which we just recorded relocation info.
     BlockConstPoolFor(1);
   }
 
   if (!RelocInfo::IsNone(rmode)) {
     // Don't record external references unless the heap will be serialized.
     if (rmode == RelocInfo::EXTERNAL_REFERENCE &&
         !serializer_enabled() && !emit_debug_code()) {
       return;
     }
     DCHECK(buffer_space() >= kMaxRelocSize);  // too late to grow buffer here
     if (rmode == RelocInfo::CODE_TARGET_WITH_ID) {
-      RelocInfo reloc_info_with_ast_id(isolate(), reinterpret_cast<byte*>(pc_),
-                                       rmode, RecordedAstId().ToInt(), NULL);
+      RelocInfo reloc_info_with_ast_id(reinterpret_cast<byte*>(pc_), rmode,
+                                       RecordedAstId().ToInt(), NULL);
       ClearRecordedAstId();
       reloc_info_writer.Write(&reloc_info_with_ast_id);
     } else {
       reloc_info_writer.Write(&rinfo);
     }
   }
 }
 
 
 void Assembler::BlockConstPoolFor(int instructions) {
@@ skipping 68 matching lines @@
 
 bool Assembler::ShouldEmitVeneer(int max_reachable_pc, int margin) {
   // Account for the branch around the veneers and the guard.
   int protection_offset = 2 * kInstructionSize;
   return pc_offset() > max_reachable_pc - margin - protection_offset -
     static_cast<int>(unresolved_branches_.size() * kMaxVeneerCodeSize);
 }
 
 
 void Assembler::RecordVeneerPool(int location_offset, int size) {
-  RelocInfo rinfo(isolate(), buffer_ + location_offset, RelocInfo::VENEER_POOL,
+  RelocInfo rinfo(buffer_ + location_offset, RelocInfo::VENEER_POOL,
                   static_cast<intptr_t>(size), NULL);
   reloc_info_writer.Write(&rinfo);
 }
 
 
 void Assembler::EmitVeneers(bool force_emit, bool need_protection, int margin) {
   BlockPoolsScope scope(this);
   RecordComment("[ Veneers");
 
   // The exact size of the veneer pool must be recorded (see the comment at the
@@ skipping 22 matching lines @@
       Instruction* branch = InstructionAt(it->second.pc_offset_);
       Label* label = it->second.label_;
 
 #ifdef DEBUG
       bind(&veneer_size_check);
 #endif
       // Patch the branch to point to the current position, and emit a branch
       // to the label.
       Instruction* veneer = reinterpret_cast<Instruction*>(pc_);
       RemoveBranchFromLabelLinkChain(branch, label, veneer);
-      branch->SetImmPCOffsetTarget(isolate(), veneer);
+      branch->SetImmPCOffsetTarget(isolate_data(), veneer);
       b(label);
 #ifdef DEBUG
       DCHECK(SizeOfCodeGeneratedSince(&veneer_size_check) <=
              static_cast<uint64_t>(kMaxVeneerCodeSize));
       veneer_size_check.Unuse();
 #endif
 
       it_to_delete = it++;
       unresolved_branches_.erase(it_to_delete);
     } else {
@@ skipping 92 matching lines @@
   movk(scratch, (target_offset >> 32) & 0xFFFF, 32);
   DCHECK((target_offset >> 48) == 0);
   add(rd, rd, scratch);
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_ARM64