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Side by Side Diff: src/compiler/instruction-selector.cc

Issue 2729943002: [WASM] Implement remaining F32x4 operations for ARM. (Closed)
Patch Set: Rebase. Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector.h" 5 #include "src/compiler/instruction-selector.h"
6 6
7 #include <limits> 7 #include <limits>
8 8
9 #include "src/base/adapters.h" 9 #include "src/base/adapters.h"
10 #include "src/compiler/compiler-source-position-table.h" 10 #include "src/compiler/compiler-source-position-table.h"
(...skipping 1464 matching lines...) Expand 10 before | Expand all | Expand 10 after
1475 case IrOpcode::kFloat32x4ReplaceLane: 1475 case IrOpcode::kFloat32x4ReplaceLane:
1476 return MarkAsSimd128(node), VisitFloat32x4ReplaceLane(node); 1476 return MarkAsSimd128(node), VisitFloat32x4ReplaceLane(node);
1477 case IrOpcode::kFloat32x4FromInt32x4: 1477 case IrOpcode::kFloat32x4FromInt32x4:
1478 return MarkAsSimd128(node), VisitFloat32x4FromInt32x4(node); 1478 return MarkAsSimd128(node), VisitFloat32x4FromInt32x4(node);
1479 case IrOpcode::kFloat32x4FromUint32x4: 1479 case IrOpcode::kFloat32x4FromUint32x4:
1480 return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node); 1480 return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node);
1481 case IrOpcode::kFloat32x4Abs: 1481 case IrOpcode::kFloat32x4Abs:
1482 return MarkAsSimd128(node), VisitFloat32x4Abs(node); 1482 return MarkAsSimd128(node), VisitFloat32x4Abs(node);
1483 case IrOpcode::kFloat32x4Neg: 1483 case IrOpcode::kFloat32x4Neg:
1484 return MarkAsSimd128(node), VisitFloat32x4Neg(node); 1484 return MarkAsSimd128(node), VisitFloat32x4Neg(node);
1485 case IrOpcode::kFloat32x4RecipApprox:
1486 return MarkAsSimd128(node), VisitFloat32x4RecipApprox(node);
1487 case IrOpcode::kFloat32x4RecipRefine:
1488 return MarkAsSimd128(node), VisitFloat32x4RecipRefine(node);
1489 case IrOpcode::kFloat32x4RecipSqrtApprox:
1490 return MarkAsSimd128(node), VisitFloat32x4RecipSqrtApprox(node);
1491 case IrOpcode::kFloat32x4RecipSqrtRefine:
1492 return MarkAsSimd128(node), VisitFloat32x4RecipSqrtRefine(node);
1485 case IrOpcode::kFloat32x4Add: 1493 case IrOpcode::kFloat32x4Add:
1486 return MarkAsSimd128(node), VisitFloat32x4Add(node); 1494 return MarkAsSimd128(node), VisitFloat32x4Add(node);
1487 case IrOpcode::kFloat32x4Sub: 1495 case IrOpcode::kFloat32x4Sub:
1488 return MarkAsSimd128(node), VisitFloat32x4Sub(node); 1496 return MarkAsSimd128(node), VisitFloat32x4Sub(node);
1497 case IrOpcode::kFloat32x4Mul:
1498 return MarkAsSimd128(node), VisitFloat32x4Mul(node);
1499 case IrOpcode::kFloat32x4Min:
1500 return MarkAsSimd128(node), VisitFloat32x4Min(node);
1501 case IrOpcode::kFloat32x4Max:
1502 return MarkAsSimd128(node), VisitFloat32x4Max(node);
1489 case IrOpcode::kFloat32x4Equal: 1503 case IrOpcode::kFloat32x4Equal:
1490 return MarkAsSimd1x4(node), VisitFloat32x4Equal(node); 1504 return MarkAsSimd1x4(node), VisitFloat32x4Equal(node);
1491 case IrOpcode::kFloat32x4NotEqual: 1505 case IrOpcode::kFloat32x4NotEqual:
1492 return MarkAsSimd1x4(node), VisitFloat32x4NotEqual(node); 1506 return MarkAsSimd1x4(node), VisitFloat32x4NotEqual(node);
1507 case IrOpcode::kFloat32x4LessThan:
1508 return MarkAsSimd1x4(node), VisitFloat32x4LessThan(node);
1509 case IrOpcode::kFloat32x4LessThanOrEqual:
1510 return MarkAsSimd1x4(node), VisitFloat32x4LessThanOrEqual(node);
1493 case IrOpcode::kInt32x4Splat: 1511 case IrOpcode::kInt32x4Splat:
1494 return MarkAsSimd128(node), VisitInt32x4Splat(node); 1512 return MarkAsSimd128(node), VisitInt32x4Splat(node);
1495 case IrOpcode::kInt32x4ExtractLane: 1513 case IrOpcode::kInt32x4ExtractLane:
1496 return MarkAsWord32(node), VisitInt32x4ExtractLane(node); 1514 return MarkAsWord32(node), VisitInt32x4ExtractLane(node);
1497 case IrOpcode::kInt32x4ReplaceLane: 1515 case IrOpcode::kInt32x4ReplaceLane:
1498 return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node); 1516 return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node);
1499 case IrOpcode::kInt32x4FromFloat32x4: 1517 case IrOpcode::kInt32x4FromFloat32x4:
1500 return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node); 1518 return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node);
1501 case IrOpcode::kUint32x4FromFloat32x4: 1519 case IrOpcode::kUint32x4FromFloat32x4:
1502 return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node); 1520 return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node);
(...skipping 10 matching lines...) Expand all
1513 case IrOpcode::kInt32x4Mul: 1531 case IrOpcode::kInt32x4Mul:
1514 return MarkAsSimd128(node), VisitInt32x4Mul(node); 1532 return MarkAsSimd128(node), VisitInt32x4Mul(node);
1515 case IrOpcode::kInt32x4Min: 1533 case IrOpcode::kInt32x4Min:
1516 return MarkAsSimd128(node), VisitInt32x4Min(node); 1534 return MarkAsSimd128(node), VisitInt32x4Min(node);
1517 case IrOpcode::kInt32x4Max: 1535 case IrOpcode::kInt32x4Max:
1518 return MarkAsSimd128(node), VisitInt32x4Max(node); 1536 return MarkAsSimd128(node), VisitInt32x4Max(node);
1519 case IrOpcode::kInt32x4Equal: 1537 case IrOpcode::kInt32x4Equal:
1520 return MarkAsSimd1x4(node), VisitInt32x4Equal(node); 1538 return MarkAsSimd1x4(node), VisitInt32x4Equal(node);
1521 case IrOpcode::kInt32x4NotEqual: 1539 case IrOpcode::kInt32x4NotEqual:
1522 return MarkAsSimd1x4(node), VisitInt32x4NotEqual(node); 1540 return MarkAsSimd1x4(node), VisitInt32x4NotEqual(node);
1523 case IrOpcode::kInt32x4GreaterThan: 1541 case IrOpcode::kInt32x4LessThan:
1524 return MarkAsSimd1x4(node), VisitInt32x4GreaterThan(node); 1542 return MarkAsSimd1x4(node), VisitInt32x4LessThan(node);
1525 case IrOpcode::kInt32x4GreaterThanOrEqual: 1543 case IrOpcode::kInt32x4LessThanOrEqual:
1526 return MarkAsSimd1x4(node), VisitInt32x4GreaterThanOrEqual(node); 1544 return MarkAsSimd1x4(node), VisitInt32x4LessThanOrEqual(node);
1527 case IrOpcode::kUint32x4ShiftRightByScalar: 1545 case IrOpcode::kUint32x4ShiftRightByScalar:
1528 return MarkAsSimd128(node), VisitUint32x4ShiftRightByScalar(node); 1546 return MarkAsSimd128(node), VisitUint32x4ShiftRightByScalar(node);
1529 case IrOpcode::kUint32x4Min: 1547 case IrOpcode::kUint32x4Min:
1530 return MarkAsSimd128(node), VisitUint32x4Min(node); 1548 return MarkAsSimd128(node), VisitUint32x4Min(node);
1531 case IrOpcode::kUint32x4Max: 1549 case IrOpcode::kUint32x4Max:
1532 return MarkAsSimd128(node), VisitUint32x4Max(node); 1550 return MarkAsSimd128(node), VisitUint32x4Max(node);
1533 case IrOpcode::kUint32x4GreaterThan: 1551 case IrOpcode::kUint32x4LessThan:
1534 return MarkAsSimd1x4(node), VisitUint32x4GreaterThan(node); 1552 return MarkAsSimd1x4(node), VisitUint32x4LessThan(node);
1535 case IrOpcode::kUint32x4GreaterThanOrEqual: 1553 case IrOpcode::kUint32x4LessThanOrEqual:
1536 return MarkAsSimd1x4(node), VisitUint32x4GreaterThanOrEqual(node); 1554 return MarkAsSimd1x4(node), VisitUint32x4LessThanOrEqual(node);
1537 case IrOpcode::kInt16x8Splat: 1555 case IrOpcode::kInt16x8Splat:
1538 return MarkAsSimd128(node), VisitInt16x8Splat(node); 1556 return MarkAsSimd128(node), VisitInt16x8Splat(node);
1539 case IrOpcode::kInt16x8ExtractLane: 1557 case IrOpcode::kInt16x8ExtractLane:
1540 return MarkAsWord32(node), VisitInt16x8ExtractLane(node); 1558 return MarkAsWord32(node), VisitInt16x8ExtractLane(node);
1541 case IrOpcode::kInt16x8ReplaceLane: 1559 case IrOpcode::kInt16x8ReplaceLane:
1542 return MarkAsSimd128(node), VisitInt16x8ReplaceLane(node); 1560 return MarkAsSimd128(node), VisitInt16x8ReplaceLane(node);
1543 case IrOpcode::kInt16x8Neg: 1561 case IrOpcode::kInt16x8Neg:
1544 return MarkAsSimd128(node), VisitInt16x8Neg(node); 1562 return MarkAsSimd128(node), VisitInt16x8Neg(node);
1545 case IrOpcode::kInt16x8ShiftLeftByScalar: 1563 case IrOpcode::kInt16x8ShiftLeftByScalar:
1546 return MarkAsSimd128(node), VisitInt16x8ShiftLeftByScalar(node); 1564 return MarkAsSimd128(node), VisitInt16x8ShiftLeftByScalar(node);
(...skipping 10 matching lines...) Expand all
1557 case IrOpcode::kInt16x8Mul: 1575 case IrOpcode::kInt16x8Mul:
1558 return MarkAsSimd128(node), VisitInt16x8Mul(node); 1576 return MarkAsSimd128(node), VisitInt16x8Mul(node);
1559 case IrOpcode::kInt16x8Min: 1577 case IrOpcode::kInt16x8Min:
1560 return MarkAsSimd128(node), VisitInt16x8Min(node); 1578 return MarkAsSimd128(node), VisitInt16x8Min(node);
1561 case IrOpcode::kInt16x8Max: 1579 case IrOpcode::kInt16x8Max:
1562 return MarkAsSimd128(node), VisitInt16x8Max(node); 1580 return MarkAsSimd128(node), VisitInt16x8Max(node);
1563 case IrOpcode::kInt16x8Equal: 1581 case IrOpcode::kInt16x8Equal:
1564 return MarkAsSimd1x8(node), VisitInt16x8Equal(node); 1582 return MarkAsSimd1x8(node), VisitInt16x8Equal(node);
1565 case IrOpcode::kInt16x8NotEqual: 1583 case IrOpcode::kInt16x8NotEqual:
1566 return MarkAsSimd1x8(node), VisitInt16x8NotEqual(node); 1584 return MarkAsSimd1x8(node), VisitInt16x8NotEqual(node);
1567 case IrOpcode::kInt16x8GreaterThan: 1585 case IrOpcode::kInt16x8LessThan:
1568 return MarkAsSimd1x8(node), VisitInt16x8GreaterThan(node); 1586 return MarkAsSimd1x8(node), VisitInt16x8LessThan(node);
1569 case IrOpcode::kInt16x8GreaterThanOrEqual: 1587 case IrOpcode::kInt16x8LessThanOrEqual:
1570 return MarkAsSimd1x8(node), VisitInt16x8GreaterThanOrEqual(node); 1588 return MarkAsSimd1x8(node), VisitInt16x8LessThanOrEqual(node);
1571 case IrOpcode::kUint16x8ShiftRightByScalar: 1589 case IrOpcode::kUint16x8ShiftRightByScalar:
1572 return MarkAsSimd128(node), VisitUint16x8ShiftRightByScalar(node); 1590 return MarkAsSimd128(node), VisitUint16x8ShiftRightByScalar(node);
1573 case IrOpcode::kUint16x8AddSaturate: 1591 case IrOpcode::kUint16x8AddSaturate:
1574 return MarkAsSimd128(node), VisitUint16x8AddSaturate(node); 1592 return MarkAsSimd128(node), VisitUint16x8AddSaturate(node);
1575 case IrOpcode::kUint16x8SubSaturate: 1593 case IrOpcode::kUint16x8SubSaturate:
1576 return MarkAsSimd128(node), VisitUint16x8SubSaturate(node); 1594 return MarkAsSimd128(node), VisitUint16x8SubSaturate(node);
1577 case IrOpcode::kUint16x8Min: 1595 case IrOpcode::kUint16x8Min:
1578 return MarkAsSimd128(node), VisitUint16x8Min(node); 1596 return MarkAsSimd128(node), VisitUint16x8Min(node);
1579 case IrOpcode::kUint16x8Max: 1597 case IrOpcode::kUint16x8Max:
1580 return MarkAsSimd128(node), VisitUint16x8Max(node); 1598 return MarkAsSimd128(node), VisitUint16x8Max(node);
1581 case IrOpcode::kUint16x8GreaterThan: 1599 case IrOpcode::kUint16x8LessThan:
1582 return MarkAsSimd1x8(node), VisitUint16x8GreaterThan(node); 1600 return MarkAsSimd1x8(node), VisitUint16x8LessThan(node);
1583 case IrOpcode::kUint16x8GreaterThanOrEqual: 1601 case IrOpcode::kUint16x8LessThanOrEqual:
1584 return MarkAsSimd1x8(node), VisitUint16x8GreaterThanOrEqual(node); 1602 return MarkAsSimd1x8(node), VisitUint16x8LessThanOrEqual(node);
1585 case IrOpcode::kInt8x16Splat: 1603 case IrOpcode::kInt8x16Splat:
1586 return MarkAsSimd128(node), VisitInt8x16Splat(node); 1604 return MarkAsSimd128(node), VisitInt8x16Splat(node);
1587 case IrOpcode::kInt8x16ExtractLane: 1605 case IrOpcode::kInt8x16ExtractLane:
1588 return MarkAsWord32(node), VisitInt8x16ExtractLane(node); 1606 return MarkAsWord32(node), VisitInt8x16ExtractLane(node);
1589 case IrOpcode::kInt8x16ReplaceLane: 1607 case IrOpcode::kInt8x16ReplaceLane:
1590 return MarkAsSimd128(node), VisitInt8x16ReplaceLane(node); 1608 return MarkAsSimd128(node), VisitInt8x16ReplaceLane(node);
1591 case IrOpcode::kInt8x16Neg: 1609 case IrOpcode::kInt8x16Neg:
1592 return MarkAsSimd128(node), VisitInt8x16Neg(node); 1610 return MarkAsSimd128(node), VisitInt8x16Neg(node);
1593 case IrOpcode::kInt8x16ShiftLeftByScalar: 1611 case IrOpcode::kInt8x16ShiftLeftByScalar:
1594 return MarkAsSimd128(node), VisitInt8x16ShiftLeftByScalar(node); 1612 return MarkAsSimd128(node), VisitInt8x16ShiftLeftByScalar(node);
(...skipping 10 matching lines...) Expand all
1605 case IrOpcode::kInt8x16Mul: 1623 case IrOpcode::kInt8x16Mul:
1606 return MarkAsSimd128(node), VisitInt8x16Mul(node); 1624 return MarkAsSimd128(node), VisitInt8x16Mul(node);
1607 case IrOpcode::kInt8x16Min: 1625 case IrOpcode::kInt8x16Min:
1608 return MarkAsSimd128(node), VisitInt8x16Min(node); 1626 return MarkAsSimd128(node), VisitInt8x16Min(node);
1609 case IrOpcode::kInt8x16Max: 1627 case IrOpcode::kInt8x16Max:
1610 return MarkAsSimd128(node), VisitInt8x16Max(node); 1628 return MarkAsSimd128(node), VisitInt8x16Max(node);
1611 case IrOpcode::kInt8x16Equal: 1629 case IrOpcode::kInt8x16Equal:
1612 return MarkAsSimd1x16(node), VisitInt8x16Equal(node); 1630 return MarkAsSimd1x16(node), VisitInt8x16Equal(node);
1613 case IrOpcode::kInt8x16NotEqual: 1631 case IrOpcode::kInt8x16NotEqual:
1614 return MarkAsSimd1x16(node), VisitInt8x16NotEqual(node); 1632 return MarkAsSimd1x16(node), VisitInt8x16NotEqual(node);
1615 case IrOpcode::kInt8x16GreaterThan: 1633 case IrOpcode::kInt8x16LessThan:
1616 return MarkAsSimd1x16(node), VisitInt8x16GreaterThan(node); 1634 return MarkAsSimd1x16(node), VisitInt8x16LessThan(node);
1617 case IrOpcode::kInt8x16GreaterThanOrEqual: 1635 case IrOpcode::kInt8x16LessThanOrEqual:
1618 return MarkAsSimd1x16(node), VisitInt8x16GreaterThanOrEqual(node); 1636 return MarkAsSimd1x16(node), VisitInt8x16LessThanOrEqual(node);
1619 case IrOpcode::kUint8x16ShiftRightByScalar: 1637 case IrOpcode::kUint8x16ShiftRightByScalar:
1620 return MarkAsSimd128(node), VisitUint8x16ShiftRightByScalar(node); 1638 return MarkAsSimd128(node), VisitUint8x16ShiftRightByScalar(node);
1621 case IrOpcode::kUint8x16AddSaturate: 1639 case IrOpcode::kUint8x16AddSaturate:
1622 return MarkAsSimd128(node), VisitUint8x16AddSaturate(node); 1640 return MarkAsSimd128(node), VisitUint8x16AddSaturate(node);
1623 case IrOpcode::kUint8x16SubSaturate: 1641 case IrOpcode::kUint8x16SubSaturate:
1624 return MarkAsSimd128(node), VisitUint8x16SubSaturate(node); 1642 return MarkAsSimd128(node), VisitUint8x16SubSaturate(node);
1625 case IrOpcode::kUint8x16Min: 1643 case IrOpcode::kUint8x16Min:
1626 return MarkAsSimd128(node), VisitUint8x16Min(node); 1644 return MarkAsSimd128(node), VisitUint8x16Min(node);
1627 case IrOpcode::kUint8x16Max: 1645 case IrOpcode::kUint8x16Max:
1628 return MarkAsSimd128(node), VisitUint8x16Max(node); 1646 return MarkAsSimd128(node), VisitUint8x16Max(node);
1629 case IrOpcode::kUint8x16GreaterThan: 1647 case IrOpcode::kUint8x16LessThan:
1630 return MarkAsSimd1x16(node), VisitUint8x16GreaterThan(node); 1648 return MarkAsSimd1x16(node), VisitUint8x16LessThan(node);
1631 case IrOpcode::kUint8x16GreaterThanOrEqual: 1649 case IrOpcode::kUint8x16LessThanOrEqual:
1632 return MarkAsSimd1x16(node), VisitUint16x8GreaterThanOrEqual(node); 1650 return MarkAsSimd1x16(node), VisitUint16x8LessThanOrEqual(node);
1633 case IrOpcode::kSimd128Zero: 1651 case IrOpcode::kSimd128Zero:
1634 return MarkAsSimd128(node), VisitSimd128Zero(node); 1652 return MarkAsSimd128(node), VisitSimd128Zero(node);
1635 case IrOpcode::kSimd128And: 1653 case IrOpcode::kSimd128And:
1636 return MarkAsSimd128(node), VisitSimd128And(node); 1654 return MarkAsSimd128(node), VisitSimd128And(node);
1637 case IrOpcode::kSimd128Or: 1655 case IrOpcode::kSimd128Or:
1638 return MarkAsSimd128(node), VisitSimd128Or(node); 1656 return MarkAsSimd128(node), VisitSimd128Or(node);
1639 case IrOpcode::kSimd128Xor: 1657 case IrOpcode::kSimd128Xor:
1640 return MarkAsSimd128(node), VisitSimd128Xor(node); 1658 return MarkAsSimd128(node), VisitSimd128Xor(node);
1641 case IrOpcode::kSimd128Not: 1659 case IrOpcode::kSimd128Not:
1642 return MarkAsSimd128(node), VisitSimd128Not(node); 1660 return MarkAsSimd128(node), VisitSimd128Not(node);
(...skipping 410 matching lines...) Expand 10 before | Expand all | Expand 10 after
2053 } 2071 }
2054 2072
2055 void InstructionSelector::VisitFloat32x4FromUint32x4(Node* node) { 2073 void InstructionSelector::VisitFloat32x4FromUint32x4(Node* node) {
2056 UNIMPLEMENTED(); 2074 UNIMPLEMENTED();
2057 } 2075 }
2058 2076
2059 void InstructionSelector::VisitFloat32x4Abs(Node* node) { UNIMPLEMENTED(); } 2077 void InstructionSelector::VisitFloat32x4Abs(Node* node) { UNIMPLEMENTED(); }
2060 2078
2061 void InstructionSelector::VisitFloat32x4Neg(Node* node) { UNIMPLEMENTED(); } 2079 void InstructionSelector::VisitFloat32x4Neg(Node* node) { UNIMPLEMENTED(); }
2062 2080
2081 void InstructionSelector::VisitFloat32x4RecipApprox(Node* node) {
2082 UNIMPLEMENTED();
2083 }
2084
2085 void InstructionSelector::VisitFloat32x4RecipRefine(Node* node) {
2086 UNIMPLEMENTED();
2087 }
2088
2089 void InstructionSelector::VisitFloat32x4RecipSqrtApprox(Node* node) {
2090 UNIMPLEMENTED();
2091 }
2092
2093 void InstructionSelector::VisitFloat32x4RecipSqrtRefine(Node* node) {
2094 UNIMPLEMENTED();
2095 }
2096
2063 void InstructionSelector::VisitFloat32x4Add(Node* node) { UNIMPLEMENTED(); } 2097 void InstructionSelector::VisitFloat32x4Add(Node* node) { UNIMPLEMENTED(); }
2064 2098
2065 void InstructionSelector::VisitFloat32x4Sub(Node* node) { UNIMPLEMENTED(); } 2099 void InstructionSelector::VisitFloat32x4Sub(Node* node) { UNIMPLEMENTED(); }
2066 2100
2101 void InstructionSelector::VisitFloat32x4Mul(Node* node) { UNIMPLEMENTED(); }
2102
2103 void InstructionSelector::VisitFloat32x4Max(Node* node) { UNIMPLEMENTED(); }
2104
2105 void InstructionSelector::VisitFloat32x4Min(Node* node) { UNIMPLEMENTED(); }
2106
2067 void InstructionSelector::VisitFloat32x4Equal(Node* node) { UNIMPLEMENTED(); } 2107 void InstructionSelector::VisitFloat32x4Equal(Node* node) { UNIMPLEMENTED(); }
2068 2108
2069 void InstructionSelector::VisitFloat32x4NotEqual(Node* node) { 2109 void InstructionSelector::VisitFloat32x4NotEqual(Node* node) {
2070 UNIMPLEMENTED(); 2110 UNIMPLEMENTED();
2071 } 2111 }
2072 2112
2113 void InstructionSelector::VisitFloat32x4LessThan(Node* node) {
2114 UNIMPLEMENTED();
2115 }
2116
2117 void InstructionSelector::VisitFloat32x4LessThanOrEqual(Node* node) {
2118 UNIMPLEMENTED();
2119 }
2120
2073 void InstructionSelector::VisitInt32x4FromFloat32x4(Node* node) { 2121 void InstructionSelector::VisitInt32x4FromFloat32x4(Node* node) {
2074 UNIMPLEMENTED(); 2122 UNIMPLEMENTED();
2075 } 2123 }
2076 2124
2077 void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) { 2125 void InstructionSelector::VisitUint32x4FromFloat32x4(Node* node) {
2078 UNIMPLEMENTED(); 2126 UNIMPLEMENTED();
2079 } 2127 }
2080 2128
2081 void InstructionSelector::VisitInt32x4Neg(Node* node) { UNIMPLEMENTED(); } 2129 void InstructionSelector::VisitInt32x4Neg(Node* node) { UNIMPLEMENTED(); }
2082 2130
(...skipping 14 matching lines...) Expand all
2097 void InstructionSelector::VisitInt32x4Equal(Node* node) { UNIMPLEMENTED(); } 2145 void InstructionSelector::VisitInt32x4Equal(Node* node) { UNIMPLEMENTED(); }
2098 2146
2099 void InstructionSelector::VisitInt32x4NotEqual(Node* node) { UNIMPLEMENTED(); } 2147 void InstructionSelector::VisitInt32x4NotEqual(Node* node) { UNIMPLEMENTED(); }
2100 2148
2101 void InstructionSelector::VisitInt32x4LessThan(Node* node) { UNIMPLEMENTED(); } 2149 void InstructionSelector::VisitInt32x4LessThan(Node* node) { UNIMPLEMENTED(); }
2102 2150
2103 void InstructionSelector::VisitInt32x4LessThanOrEqual(Node* node) { 2151 void InstructionSelector::VisitInt32x4LessThanOrEqual(Node* node) {
2104 UNIMPLEMENTED(); 2152 UNIMPLEMENTED();
2105 } 2153 }
2106 2154
2107 void InstructionSelector::VisitInt32x4GreaterThan(Node* node) {
2108 UNIMPLEMENTED();
2109 }
2110
2111 void InstructionSelector::VisitInt32x4GreaterThanOrEqual(Node* node) {
2112 UNIMPLEMENTED();
2113 }
2114
2115 void InstructionSelector::VisitUint32x4ShiftRightByScalar(Node* node) { 2155 void InstructionSelector::VisitUint32x4ShiftRightByScalar(Node* node) {
2116 UNIMPLEMENTED(); 2156 UNIMPLEMENTED();
2117 } 2157 }
2118 2158
2119 void InstructionSelector::VisitUint32x4Max(Node* node) { UNIMPLEMENTED(); } 2159 void InstructionSelector::VisitUint32x4Max(Node* node) { UNIMPLEMENTED(); }
2120 2160
2121 void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); } 2161 void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); }
2122 2162
2123 void InstructionSelector::VisitUint32x4GreaterThan(Node* node) { 2163 void InstructionSelector::VisitUint32x4LessThan(Node* node) { UNIMPLEMENTED(); }
2164
2165 void InstructionSelector::VisitUint32x4LessThanOrEqual(Node* node) {
2124 UNIMPLEMENTED(); 2166 UNIMPLEMENTED();
2125 } 2167 }
2126 2168
2127 void InstructionSelector::VisitUint32x4GreaterThanOrEqual(Node* node) {
2128 UNIMPLEMENTED();
2129 }
2130
2131 void InstructionSelector::VisitInt16x8Splat(Node* node) { UNIMPLEMENTED(); } 2169 void InstructionSelector::VisitInt16x8Splat(Node* node) { UNIMPLEMENTED(); }
2132 2170
2133 void InstructionSelector::VisitInt16x8ExtractLane(Node* node) { 2171 void InstructionSelector::VisitInt16x8ExtractLane(Node* node) {
2134 UNIMPLEMENTED(); 2172 UNIMPLEMENTED();
2135 } 2173 }
2136 2174
2137 void InstructionSelector::VisitInt16x8ReplaceLane(Node* node) { 2175 void InstructionSelector::VisitInt16x8ReplaceLane(Node* node) {
2138 UNIMPLEMENTED(); 2176 UNIMPLEMENTED();
2139 } 2177 }
2140 2178
(...skipping 28 matching lines...) Expand all
2169 void InstructionSelector::VisitInt16x8Equal(Node* node) { UNIMPLEMENTED(); } 2207 void InstructionSelector::VisitInt16x8Equal(Node* node) { UNIMPLEMENTED(); }
2170 2208
2171 void InstructionSelector::VisitInt16x8NotEqual(Node* node) { UNIMPLEMENTED(); } 2209 void InstructionSelector::VisitInt16x8NotEqual(Node* node) { UNIMPLEMENTED(); }
2172 2210
2173 void InstructionSelector::VisitInt16x8LessThan(Node* node) { UNIMPLEMENTED(); } 2211 void InstructionSelector::VisitInt16x8LessThan(Node* node) { UNIMPLEMENTED(); }
2174 2212
2175 void InstructionSelector::VisitInt16x8LessThanOrEqual(Node* node) { 2213 void InstructionSelector::VisitInt16x8LessThanOrEqual(Node* node) {
2176 UNIMPLEMENTED(); 2214 UNIMPLEMENTED();
2177 } 2215 }
2178 2216
2179 void InstructionSelector::VisitInt16x8GreaterThan(Node* node) {
2180 UNIMPLEMENTED();
2181 }
2182
2183 void InstructionSelector::VisitInt16x8GreaterThanOrEqual(Node* node) {
2184 UNIMPLEMENTED();
2185 }
2186
2187 void InstructionSelector::VisitUint16x8ShiftRightByScalar(Node* node) { 2217 void InstructionSelector::VisitUint16x8ShiftRightByScalar(Node* node) {
2188 UNIMPLEMENTED(); 2218 UNIMPLEMENTED();
2189 } 2219 }
2190 2220
2191 void InstructionSelector::VisitUint16x8AddSaturate(Node* node) { 2221 void InstructionSelector::VisitUint16x8AddSaturate(Node* node) {
2192 UNIMPLEMENTED(); 2222 UNIMPLEMENTED();
2193 } 2223 }
2194 2224
2195 void InstructionSelector::VisitUint16x8SubSaturate(Node* node) { 2225 void InstructionSelector::VisitUint16x8SubSaturate(Node* node) {
2196 UNIMPLEMENTED(); 2226 UNIMPLEMENTED();
2197 } 2227 }
2198 2228
2199 void InstructionSelector::VisitUint16x8Max(Node* node) { UNIMPLEMENTED(); } 2229 void InstructionSelector::VisitUint16x8Max(Node* node) { UNIMPLEMENTED(); }
2200 2230
2201 void InstructionSelector::VisitUint16x8Min(Node* node) { UNIMPLEMENTED(); } 2231 void InstructionSelector::VisitUint16x8Min(Node* node) { UNIMPLEMENTED(); }
2202 2232
2203 void InstructionSelector::VisitUint16x8GreaterThan(Node* node) { 2233 void InstructionSelector::VisitUint16x8LessThan(Node* node) { UNIMPLEMENTED(); }
2234
2235 void InstructionSelector::VisitUint16x8LessThanOrEqual(Node* node) {
2204 UNIMPLEMENTED(); 2236 UNIMPLEMENTED();
2205 } 2237 }
2206 2238
2207 void InstructionSelector::VisitUint16x8GreaterThanOrEqual(Node* node) {
2208 UNIMPLEMENTED();
2209 }
2210
2211 void InstructionSelector::VisitInt8x16Splat(Node* node) { UNIMPLEMENTED(); } 2239 void InstructionSelector::VisitInt8x16Splat(Node* node) { UNIMPLEMENTED(); }
2212 2240
2213 void InstructionSelector::VisitInt8x16ExtractLane(Node* node) { 2241 void InstructionSelector::VisitInt8x16ExtractLane(Node* node) {
2214 UNIMPLEMENTED(); 2242 UNIMPLEMENTED();
2215 } 2243 }
2216 2244
2217 void InstructionSelector::VisitInt8x16ReplaceLane(Node* node) { 2245 void InstructionSelector::VisitInt8x16ReplaceLane(Node* node) {
2218 UNIMPLEMENTED(); 2246 UNIMPLEMENTED();
2219 } 2247 }
2220 2248
(...skipping 28 matching lines...) Expand all
2249 void InstructionSelector::VisitInt8x16Equal(Node* node) { UNIMPLEMENTED(); } 2277 void InstructionSelector::VisitInt8x16Equal(Node* node) { UNIMPLEMENTED(); }
2250 2278
2251 void InstructionSelector::VisitInt8x16NotEqual(Node* node) { UNIMPLEMENTED(); } 2279 void InstructionSelector::VisitInt8x16NotEqual(Node* node) { UNIMPLEMENTED(); }
2252 2280
2253 void InstructionSelector::VisitInt8x16LessThan(Node* node) { UNIMPLEMENTED(); } 2281 void InstructionSelector::VisitInt8x16LessThan(Node* node) { UNIMPLEMENTED(); }
2254 2282
2255 void InstructionSelector::VisitInt8x16LessThanOrEqual(Node* node) { 2283 void InstructionSelector::VisitInt8x16LessThanOrEqual(Node* node) {
2256 UNIMPLEMENTED(); 2284 UNIMPLEMENTED();
2257 } 2285 }
2258 2286
2259 void InstructionSelector::VisitInt8x16GreaterThan(Node* node) {
2260 UNIMPLEMENTED();
2261 }
2262
2263 void InstructionSelector::VisitInt8x16GreaterThanOrEqual(Node* node) {
2264 UNIMPLEMENTED();
2265 }
2266
2267 void InstructionSelector::VisitUint8x16ShiftRightByScalar(Node* node) { 2287 void InstructionSelector::VisitUint8x16ShiftRightByScalar(Node* node) {
2268 UNIMPLEMENTED(); 2288 UNIMPLEMENTED();
2269 } 2289 }
2270 2290
2271 void InstructionSelector::VisitUint8x16AddSaturate(Node* node) { 2291 void InstructionSelector::VisitUint8x16AddSaturate(Node* node) {
2272 UNIMPLEMENTED(); 2292 UNIMPLEMENTED();
2273 } 2293 }
2274 2294
2275 void InstructionSelector::VisitUint8x16SubSaturate(Node* node) { 2295 void InstructionSelector::VisitUint8x16SubSaturate(Node* node) {
2276 UNIMPLEMENTED(); 2296 UNIMPLEMENTED();
2277 } 2297 }
2278 2298
2279 void InstructionSelector::VisitUint8x16Max(Node* node) { UNIMPLEMENTED(); } 2299 void InstructionSelector::VisitUint8x16Max(Node* node) { UNIMPLEMENTED(); }
2280 2300
2281 void InstructionSelector::VisitUint8x16Min(Node* node) { UNIMPLEMENTED(); } 2301 void InstructionSelector::VisitUint8x16Min(Node* node) { UNIMPLEMENTED(); }
2282 2302
2283 void InstructionSelector::VisitUint8x16GreaterThan(Node* node) { 2303 void InstructionSelector::VisitUint8x16LessThan(Node* node) { UNIMPLEMENTED(); }
2304
2305 void InstructionSelector::VisitUint8x16LessThanOrEqual(Node* node) {
2284 UNIMPLEMENTED(); 2306 UNIMPLEMENTED();
2285 } 2307 }
2286 2308
2287 void InstructionSelector::VisitUint8x16GreaterThanOrEqual(Node* node) {
2288 UNIMPLEMENTED();
2289 }
2290
2291 void InstructionSelector::VisitSimd128And(Node* node) { UNIMPLEMENTED(); } 2309 void InstructionSelector::VisitSimd128And(Node* node) { UNIMPLEMENTED(); }
2292 2310
2293 void InstructionSelector::VisitSimd128Or(Node* node) { UNIMPLEMENTED(); } 2311 void InstructionSelector::VisitSimd128Or(Node* node) { UNIMPLEMENTED(); }
2294 2312
2295 void InstructionSelector::VisitSimd128Xor(Node* node) { UNIMPLEMENTED(); } 2313 void InstructionSelector::VisitSimd128Xor(Node* node) { UNIMPLEMENTED(); }
2296 2314
2297 void InstructionSelector::VisitSimd128Not(Node* node) { UNIMPLEMENTED(); } 2315 void InstructionSelector::VisitSimd128Not(Node* node) { UNIMPLEMENTED(); }
2298 2316
2299 void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); } 2317 void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
2300 2318
(...skipping 408 matching lines...) Expand 10 before | Expand all | Expand 10 after
2709 return new (instruction_zone()) FrameStateDescriptor( 2727 return new (instruction_zone()) FrameStateDescriptor(
2710 instruction_zone(), state_info.type(), state_info.bailout_id(), 2728 instruction_zone(), state_info.type(), state_info.bailout_id(),
2711 state_info.state_combine(), parameters, locals, stack, 2729 state_info.state_combine(), parameters, locals, stack,
2712 state_info.shared_info(), outer_state); 2730 state_info.shared_info(), outer_state);
2713 } 2731 }
2714 2732
2715 2733
2716 } // namespace compiler 2734 } // namespace compiler
2717 } // namespace internal 2735 } // namespace internal
2718 } // namespace v8 2736 } // namespace v8
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