Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(716)

Issues Search
    My Issues | Starred     Open | Closed | All

Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 2729943002: [WASM] Implement remaining F32x4 operations for ARM. (Closed)
Patch Set: Rebase. Created 3 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/arm/instruction-scheduler-arm.cc ('k') | src/compiler/instruction-selector.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 2216 matching lines...) Expand 10 before | Expand all | Expand 10 after
2227 V(32x4) \ 2227 V(32x4) \
2228 V(16x8) \ 2228 V(16x8) \
2229 V(8x16) 2229 V(8x16)
2230 2230
2231 #define SIMD_ZERO_OP_LIST(V) \ 2231 #define SIMD_ZERO_OP_LIST(V) \
2232 V(Simd128Zero) \ 2232 V(Simd128Zero) \
2233 V(Simd1x4Zero) \ 2233 V(Simd1x4Zero) \
2234 V(Simd1x8Zero) \ 2234 V(Simd1x8Zero) \
2235 V(Simd1x16Zero) 2235 V(Simd1x16Zero)
2236 2236
2237 #define SIMD_UNOP_LIST(V) \ 2237 #define SIMD_UNOP_LIST(V) \
2238 V(Float32x4FromInt32x4, kArmFloat32x4FromInt32x4) \ 2238 V(Float32x4FromInt32x4, kArmFloat32x4FromInt32x4) \
2239 V(Float32x4FromUint32x4, kArmFloat32x4FromUint32x4) \ 2239 V(Float32x4FromUint32x4, kArmFloat32x4FromUint32x4) \
2240 V(Float32x4Abs, kArmFloat32x4Abs) \ 2240 V(Float32x4Abs, kArmFloat32x4Abs) \
2241 V(Float32x4Neg, kArmFloat32x4Neg) \ 2241 V(Float32x4Neg, kArmFloat32x4Neg) \
2242 V(Int32x4FromFloat32x4, kArmInt32x4FromFloat32x4) \ 2242 V(Float32x4RecipApprox, kArmFloat32x4RecipApprox) \
2243 V(Uint32x4FromFloat32x4, kArmUint32x4FromFloat32x4) \ 2243 V(Float32x4RecipSqrtApprox, kArmFloat32x4RecipSqrtApprox) \
2244 V(Int32x4Neg, kArmInt32x4Neg) \ 2244 V(Int32x4FromFloat32x4, kArmInt32x4FromFloat32x4) \
2245 V(Int16x8Neg, kArmInt16x8Neg) \ 2245 V(Uint32x4FromFloat32x4, kArmUint32x4FromFloat32x4) \
2246 V(Int8x16Neg, kArmInt8x16Neg) \ 2246 V(Int32x4Neg, kArmInt32x4Neg) \
2247 V(Simd128Not, kArmSimd128Not) \ 2247 V(Int16x8Neg, kArmInt16x8Neg) \
2248 V(Simd1x4Not, kArmSimd128Not) \ 2248 V(Int8x16Neg, kArmInt8x16Neg) \
2249 V(Simd1x4AnyTrue, kArmSimd1x4AnyTrue) \ 2249 V(Simd128Not, kArmSimd128Not) \
2250 V(Simd1x4AllTrue, kArmSimd1x4AllTrue) \ 2250 V(Simd1x4Not, kArmSimd128Not) \
2251 V(Simd1x8Not, kArmSimd128Not) \ 2251 V(Simd1x4AnyTrue, kArmSimd1x4AnyTrue) \
2252 V(Simd1x8AnyTrue, kArmSimd1x8AnyTrue) \ 2252 V(Simd1x4AllTrue, kArmSimd1x4AllTrue) \
2253 V(Simd1x8AllTrue, kArmSimd1x8AllTrue) \ 2253 V(Simd1x8Not, kArmSimd128Not) \
2254 V(Simd1x16Not, kArmSimd128Not) \ 2254 V(Simd1x8AnyTrue, kArmSimd1x8AnyTrue) \
2255 V(Simd1x16AnyTrue, kArmSimd1x16AnyTrue) \ 2255 V(Simd1x8AllTrue, kArmSimd1x8AllTrue) \
2256 V(Simd1x16Not, kArmSimd128Not) \
2257 V(Simd1x16AnyTrue, kArmSimd1x16AnyTrue) \
2256 V(Simd1x16AllTrue, kArmSimd1x16AllTrue) 2258 V(Simd1x16AllTrue, kArmSimd1x16AllTrue)
2257 2259
2258 #define SIMD_BINOP_LIST(V) \ 2260 #define SIMD_BINOP_LIST(V) \
2259 V(Float32x4Add, kArmFloat32x4Add) \ 2261 V(Float32x4Add, kArmFloat32x4Add) \
2260 V(Float32x4Sub, kArmFloat32x4Sub) \ 2262 V(Float32x4Sub, kArmFloat32x4Sub) \
2261 V(Float32x4Equal, kArmFloat32x4Equal) \ 2263 V(Float32x4Mul, kArmFloat32x4Mul) \
2262 V(Float32x4NotEqual, kArmFloat32x4NotEqual) \ 2264 V(Float32x4Min, kArmFloat32x4Min) \
2263 V(Int32x4Add, kArmInt32x4Add) \ 2265 V(Float32x4Max, kArmFloat32x4Max) \
2264 V(Int32x4Sub, kArmInt32x4Sub) \ 2266 V(Float32x4RecipRefine, kArmFloat32x4RecipRefine) \
2265 V(Int32x4Mul, kArmInt32x4Mul) \ 2267 V(Float32x4RecipSqrtRefine, kArmFloat32x4RecipSqrtRefine) \
2266 V(Int32x4Min, kArmInt32x4Min) \ 2268 V(Float32x4Equal, kArmFloat32x4Equal) \
2267 V(Int32x4Max, kArmInt32x4Max) \ 2269 V(Float32x4NotEqual, kArmFloat32x4NotEqual) \
2268 V(Int32x4Equal, kArmInt32x4Equal) \ 2270 V(Float32x4LessThan, kArmFloat32x4LessThan) \
2269 V(Int32x4NotEqual, kArmInt32x4NotEqual) \ 2271 V(Float32x4LessThanOrEqual, kArmFloat32x4LessThanOrEqual) \
2270 V(Int32x4GreaterThan, kArmInt32x4GreaterThan) \ 2272 V(Int32x4Add, kArmInt32x4Add) \
2271 V(Int32x4GreaterThanOrEqual, kArmInt32x4GreaterThanOrEqual) \ 2273 V(Int32x4Sub, kArmInt32x4Sub) \
2272 V(Uint32x4Min, kArmUint32x4Min) \ 2274 V(Int32x4Mul, kArmInt32x4Mul) \
2273 V(Uint32x4Max, kArmUint32x4Max) \ 2275 V(Int32x4Min, kArmInt32x4Min) \
2274 V(Uint32x4GreaterThan, kArmUint32x4GreaterThan) \ 2276 V(Int32x4Max, kArmInt32x4Max) \
2275 V(Uint32x4GreaterThanOrEqual, kArmUint32x4GreaterThanOrEqual) \ 2277 V(Int32x4Equal, kArmInt32x4Equal) \
2276 V(Int16x8Add, kArmInt16x8Add) \ 2278 V(Int32x4NotEqual, kArmInt32x4NotEqual) \
2277 V(Int16x8AddSaturate, kArmInt16x8AddSaturate) \ 2279 V(Int32x4LessThan, kArmInt32x4LessThan) \
2278 V(Int16x8Sub, kArmInt16x8Sub) \ 2280 V(Int32x4LessThanOrEqual, kArmInt32x4LessThanOrEqual) \
2279 V(Int16x8SubSaturate, kArmInt16x8SubSaturate) \ 2281 V(Uint32x4Min, kArmUint32x4Min) \
2280 V(Int16x8Mul, kArmInt16x8Mul) \ 2282 V(Uint32x4Max, kArmUint32x4Max) \
2281 V(Int16x8Min, kArmInt16x8Min) \ 2283 V(Uint32x4LessThan, kArmUint32x4LessThan) \
2282 V(Int16x8Max, kArmInt16x8Max) \ 2284 V(Uint32x4LessThanOrEqual, kArmUint32x4LessThanOrEqual) \
2283 V(Int16x8Equal, kArmInt16x8Equal) \ 2285 V(Int16x8Add, kArmInt16x8Add) \
2284 V(Int16x8NotEqual, kArmInt16x8NotEqual) \ 2286 V(Int16x8AddSaturate, kArmInt16x8AddSaturate) \
2285 V(Int16x8GreaterThan, kArmInt16x8GreaterThan) \ 2287 V(Int16x8Sub, kArmInt16x8Sub) \
2286 V(Int16x8GreaterThanOrEqual, kArmInt16x8GreaterThanOrEqual) \ 2288 V(Int16x8SubSaturate, kArmInt16x8SubSaturate) \
2287 V(Uint16x8AddSaturate, kArmUint16x8AddSaturate) \ 2289 V(Int16x8Mul, kArmInt16x8Mul) \
2288 V(Uint16x8SubSaturate, kArmUint16x8SubSaturate) \ 2290 V(Int16x8Min, kArmInt16x8Min) \
2289 V(Uint16x8Min, kArmUint16x8Min) \ 2291 V(Int16x8Max, kArmInt16x8Max) \
2290 V(Uint16x8Max, kArmUint16x8Max) \ 2292 V(Int16x8Equal, kArmInt16x8Equal) \
2291 V(Uint16x8GreaterThan, kArmUint16x8GreaterThan) \ 2293 V(Int16x8NotEqual, kArmInt16x8NotEqual) \
2292 V(Uint16x8GreaterThanOrEqual, kArmUint16x8GreaterThanOrEqual) \ 2294 V(Int16x8LessThan, kArmInt16x8LessThan) \
2293 V(Int8x16Add, kArmInt8x16Add) \ 2295 V(Int16x8LessThanOrEqual, kArmInt16x8LessThanOrEqual) \
2294 V(Int8x16AddSaturate, kArmInt8x16AddSaturate) \ 2296 V(Uint16x8AddSaturate, kArmUint16x8AddSaturate) \
2295 V(Int8x16Sub, kArmInt8x16Sub) \ 2297 V(Uint16x8SubSaturate, kArmUint16x8SubSaturate) \
2296 V(Int8x16SubSaturate, kArmInt8x16SubSaturate) \ 2298 V(Uint16x8Min, kArmUint16x8Min) \
2297 V(Int8x16Mul, kArmInt8x16Mul) \ 2299 V(Uint16x8Max, kArmUint16x8Max) \
2298 V(Int8x16Min, kArmInt8x16Min) \ 2300 V(Uint16x8LessThan, kArmUint16x8LessThan) \
2299 V(Int8x16Max, kArmInt8x16Max) \ 2301 V(Uint16x8LessThanOrEqual, kArmUint16x8LessThanOrEqual) \
2300 V(Int8x16Equal, kArmInt8x16Equal) \ 2302 V(Int8x16Add, kArmInt8x16Add) \
2301 V(Int8x16NotEqual, kArmInt8x16NotEqual) \ 2303 V(Int8x16AddSaturate, kArmInt8x16AddSaturate) \
2302 V(Int8x16GreaterThan, kArmInt8x16GreaterThan) \ 2304 V(Int8x16Sub, kArmInt8x16Sub) \
2303 V(Int8x16GreaterThanOrEqual, kArmInt8x16GreaterThanOrEqual) \ 2305 V(Int8x16SubSaturate, kArmInt8x16SubSaturate) \
2304 V(Uint8x16AddSaturate, kArmUint8x16AddSaturate) \ 2306 V(Int8x16Mul, kArmInt8x16Mul) \
2305 V(Uint8x16SubSaturate, kArmUint8x16SubSaturate) \ 2307 V(Int8x16Min, kArmInt8x16Min) \
2306 V(Uint8x16Min, kArmUint8x16Min) \ 2308 V(Int8x16Max, kArmInt8x16Max) \
2307 V(Uint8x16Max, kArmUint8x16Max) \ 2309 V(Int8x16Equal, kArmInt8x16Equal) \
2308 V(Uint8x16GreaterThan, kArmUint8x16GreaterThan) \ 2310 V(Int8x16NotEqual, kArmInt8x16NotEqual) \
2309 V(Uint8x16GreaterThanOrEqual, kArmUint8x16GreaterThanOrEqual) \ 2311 V(Int8x16LessThan, kArmInt8x16LessThan) \
2310 V(Simd128And, kArmSimd128And) \ 2312 V(Int8x16LessThanOrEqual, kArmInt8x16LessThanOrEqual) \
2311 V(Simd128Or, kArmSimd128Or) \ 2313 V(Uint8x16AddSaturate, kArmUint8x16AddSaturate) \
2312 V(Simd128Xor, kArmSimd128Xor) \ 2314 V(Uint8x16SubSaturate, kArmUint8x16SubSaturate) \
2313 V(Simd1x4And, kArmSimd128And) \ 2315 V(Uint8x16Min, kArmUint8x16Min) \
2314 V(Simd1x4Or, kArmSimd128Or) \ 2316 V(Uint8x16Max, kArmUint8x16Max) \
2315 V(Simd1x4Xor, kArmSimd128Xor) \ 2317 V(Uint8x16LessThan, kArmUint8x16LessThan) \
2316 V(Simd1x8And, kArmSimd128And) \ 2318 V(Uint8x16LessThanOrEqual, kArmUint8x16LessThanOrEqual) \
2317 V(Simd1x8Or, kArmSimd128Or) \ 2319 V(Simd128And, kArmSimd128And) \
2318 V(Simd1x8Xor, kArmSimd128Xor) \ 2320 V(Simd128Or, kArmSimd128Or) \
2319 V(Simd1x16And, kArmSimd128And) \ 2321 V(Simd128Xor, kArmSimd128Xor) \
2320 V(Simd1x16Or, kArmSimd128Or) \ 2322 V(Simd1x4And, kArmSimd128And) \
2323 V(Simd1x4Or, kArmSimd128Or) \
2324 V(Simd1x4Xor, kArmSimd128Xor) \
2325 V(Simd1x8And, kArmSimd128And) \
2326 V(Simd1x8Or, kArmSimd128Or) \
2327 V(Simd1x8Xor, kArmSimd128Xor) \
2328 V(Simd1x16And, kArmSimd128And) \
2329 V(Simd1x16Or, kArmSimd128Or) \
2321 V(Simd1x16Xor, kArmSimd128Xor) 2330 V(Simd1x16Xor, kArmSimd128Xor)
2322 2331
2323 #define SIMD_SHIFT_OP_LIST(V) \ 2332 #define SIMD_SHIFT_OP_LIST(V) \
2324 V(Int32x4ShiftLeftByScalar) \ 2333 V(Int32x4ShiftLeftByScalar) \
2325 V(Int32x4ShiftRightByScalar) \ 2334 V(Int32x4ShiftRightByScalar) \
2326 V(Uint32x4ShiftRightByScalar) \ 2335 V(Uint32x4ShiftRightByScalar) \
2327 V(Int16x8ShiftLeftByScalar) \ 2336 V(Int16x8ShiftLeftByScalar) \
2328 V(Int16x8ShiftRightByScalar) \ 2337 V(Int16x8ShiftRightByScalar) \
2329 V(Uint16x8ShiftRightByScalar) \ 2338 V(Uint16x8ShiftRightByScalar) \
2330 V(Int8x16ShiftLeftByScalar) \ 2339 V(Int8x16ShiftLeftByScalar) \
(...skipping 90 matching lines...) Expand 10 before | Expand all | Expand 10 after
2421 Vector<MachineType> req_aligned = Vector<MachineType>::New(2); 2430 Vector<MachineType> req_aligned = Vector<MachineType>::New(2);
2422 req_aligned[0] = MachineType::Float32(); 2431 req_aligned[0] = MachineType::Float32();
2423 req_aligned[1] = MachineType::Float64(); 2432 req_aligned[1] = MachineType::Float64();
2424 return MachineOperatorBuilder::AlignmentRequirements:: 2433 return MachineOperatorBuilder::AlignmentRequirements::
2425 SomeUnalignedAccessUnsupported(req_aligned, req_aligned); 2434 SomeUnalignedAccessUnsupported(req_aligned, req_aligned);
2426 } 2435 }
2427 2436
2428 } // namespace compiler 2437 } // namespace compiler
2429 } // namespace internal 2438 } // namespace internal
2430 } // namespace v8 2439 } // namespace v8
OLDNEW
« no previous file with comments | « src/compiler/arm/instruction-scheduler-arm.cc ('k') | src/compiler/instruction-selector.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698