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Side by Side Diff: test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc

Issue 2728533003: [turbofan] Enable complex memory operands for binops on ia32/x64 (Closed)
Patch Set: Rebase and Add tests for the 64-bit variants Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 631 matching lines...) Expand 10 before | Expand all | Expand 10 after
642 EXPECT_TRUE(s.IsFixed(s[0]->InputAt(0), eax)); 642 EXPECT_TRUE(s.IsFixed(s[0]->InputAt(0), eax));
643 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1))); 643 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
644 EXPECT_TRUE(!s.IsUsedAtStart(s[0]->InputAt(1))); 644 EXPECT_TRUE(!s.IsUsedAtStart(s[0]->InputAt(1)));
645 ASSERT_EQ(1U, s[0]->OutputCount()); 645 ASSERT_EQ(1U, s[0]->OutputCount());
646 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 646 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
647 EXPECT_TRUE(s.IsFixed(s[0]->OutputAt(0), edx)); 647 EXPECT_TRUE(s.IsFixed(s[0]->OutputAt(0), edx));
648 } 648 }
649 649
650 650
651 // ----------------------------------------------------------------------------- 651 // -----------------------------------------------------------------------------
652 // Binops with a memory operand.
653
654 TEST_F(InstructionSelectorTest, LoadAnd32) {
655 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
656 MachineType::Int32());
657 Node* const p0 = m.Parameter(0);
658 Node* const p1 = m.Parameter(1);
659 m.Return(
660 m.Word32And(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
661 Stream s = m.Build();
662 ASSERT_EQ(1U, s.size());
663 EXPECT_EQ(kIA32And, s[0]->arch_opcode());
664 ASSERT_EQ(3U, s[0]->InputCount());
665 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
666 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
667 }
668
669 TEST_F(InstructionSelectorTest, LoadOr32) {
670 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
671 MachineType::Int32());
672 Node* const p0 = m.Parameter(0);
673 Node* const p1 = m.Parameter(1);
674 m.Return(
675 m.Word32Or(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
676 Stream s = m.Build();
677 ASSERT_EQ(1U, s.size());
678 EXPECT_EQ(kIA32Or, s[0]->arch_opcode());
679 ASSERT_EQ(3U, s[0]->InputCount());
680 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
681 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
682 }
683
684 TEST_F(InstructionSelectorTest, LoadXor32) {
685 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
686 MachineType::Int32());
687 Node* const p0 = m.Parameter(0);
688 Node* const p1 = m.Parameter(1);
689 m.Return(
690 m.Word32Xor(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
691 Stream s = m.Build();
692 ASSERT_EQ(1U, s.size());
693 EXPECT_EQ(kIA32Xor, s[0]->arch_opcode());
694 ASSERT_EQ(3U, s[0]->InputCount());
695 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
696 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
697 }
698
699 TEST_F(InstructionSelectorTest, LoadAdd32) {
700 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
701 MachineType::Int32());
702 Node* const p0 = m.Parameter(0);
703 Node* const p1 = m.Parameter(1);
704 m.Return(
705 m.Int32Add(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
706 Stream s = m.Build();
707 // Use lea instead of add, so memory operand is invalid.
708 ASSERT_EQ(2U, s.size());
709 EXPECT_EQ(kIA32Movl, s[0]->arch_opcode());
710 EXPECT_EQ(kIA32Lea, s[1]->arch_opcode());
711 }
712
713 TEST_F(InstructionSelectorTest, LoadSub32) {
714 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
715 MachineType::Int32());
716 Node* const p0 = m.Parameter(0);
717 Node* const p1 = m.Parameter(1);
718 m.Return(
719 m.Int32Sub(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
720 Stream s = m.Build();
721 ASSERT_EQ(1U, s.size());
722 EXPECT_EQ(kIA32Sub, s[0]->arch_opcode());
723 ASSERT_EQ(3U, s[0]->InputCount());
724 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
725 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
726 }
727
728 // -----------------------------------------------------------------------------
652 // Floating point operations. 729 // Floating point operations.
653 730
654
655 TEST_F(InstructionSelectorTest, Float32Abs) { 731 TEST_F(InstructionSelectorTest, Float32Abs) {
656 { 732 {
657 StreamBuilder m(this, MachineType::Float32(), MachineType::Float32()); 733 StreamBuilder m(this, MachineType::Float32(), MachineType::Float32());
658 Node* const p0 = m.Parameter(0); 734 Node* const p0 = m.Parameter(0);
659 Node* const n = m.Float32Abs(p0); 735 Node* const n = m.Float32Abs(p0);
660 m.Return(n); 736 m.Return(n);
661 Stream s = m.Build(); 737 Stream s = m.Build();
662 ASSERT_EQ(1U, s.size()); 738 ASSERT_EQ(1U, s.size());
663 EXPECT_EQ(kSSEFloat32Abs, s[0]->arch_opcode()); 739 EXPECT_EQ(kSSEFloat32Abs, s[0]->arch_opcode());
664 ASSERT_EQ(1U, s[0]->InputCount()); 740 ASSERT_EQ(1U, s[0]->InputCount());
(...skipping 119 matching lines...) Expand 10 before | Expand all | Expand 10 after
784 EXPECT_EQ(kIA32Lzcnt, s[0]->arch_opcode()); 860 EXPECT_EQ(kIA32Lzcnt, s[0]->arch_opcode());
785 ASSERT_EQ(1U, s[0]->InputCount()); 861 ASSERT_EQ(1U, s[0]->InputCount());
786 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 862 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
787 ASSERT_EQ(1U, s[0]->OutputCount()); 863 ASSERT_EQ(1U, s[0]->OutputCount());
788 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 864 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
789 } 865 }
790 866
791 } // namespace compiler 867 } // namespace compiler
792 } // namespace internal 868 } // namespace internal
793 } // namespace v8 869 } // namespace v8
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