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Side by Side Diff: test/unittests/compiler/x64/instruction-selector-x64-unittest.cc

Issue 2728533003: [turbofan] Enable complex memory operands for binops on ia32/x64 (Closed)
Patch Set: Add tests Created 3 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/objects-inl.h" 8 #include "src/objects-inl.h"
9 9
10 namespace v8 { 10 namespace v8 {
(...skipping 1189 matching lines...) Expand 10 before | Expand all | Expand 10 after
1200 Stream s = m.Build(); 1200 Stream s = m.Build();
1201 ASSERT_EQ(1U, s.size()); 1201 ASSERT_EQ(1U, s.size());
1202 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode()); 1202 EXPECT_EQ(kX64Lea32, s[0]->arch_opcode());
1203 EXPECT_EQ(kMode_M8, s[0]->addressing_mode()); 1203 EXPECT_EQ(kMode_M8, s[0]->addressing_mode());
1204 ASSERT_EQ(1U, s[0]->InputCount()); 1204 ASSERT_EQ(1U, s[0]->InputCount());
1205 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 1205 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
1206 } 1206 }
1207 1207
1208 1208
1209 // ----------------------------------------------------------------------------- 1209 // -----------------------------------------------------------------------------
1210 // Binops with a memory operand.
1211
1212 TEST_F(InstructionSelectorTest, LoadAnd32) {
ahaas 2017/03/10 12:02:50 Nit: can you also add the tests for the 64-bit var
shiyu.zhang 2017/03/13 02:39:35 Done.
1213 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
1214 MachineType::Int32());
1215 Node* const p0 = m.Parameter(0);
1216 Node* const p1 = m.Parameter(1);
1217 m.Return(
1218 m.Word32And(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
1219 Stream s = m.Build();
1220 ASSERT_EQ(1U, s.size());
1221 EXPECT_EQ(kX64And32, s[0]->arch_opcode());
1222 ASSERT_EQ(3U, s[0]->InputCount());
1223 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
1224 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
1225 }
1226
1227 TEST_F(InstructionSelectorTest, LoadOr32) {
1228 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
1229 MachineType::Int32());
1230 Node* const p0 = m.Parameter(0);
1231 Node* const p1 = m.Parameter(1);
1232 m.Return(
1233 m.Word32Or(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
1234 Stream s = m.Build();
1235 ASSERT_EQ(1U, s.size());
1236 EXPECT_EQ(kX64Or32, s[0]->arch_opcode());
1237 ASSERT_EQ(3U, s[0]->InputCount());
1238 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
1239 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
1240 }
1241
1242 TEST_F(InstructionSelectorTest, LoadXor32) {
1243 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
1244 MachineType::Int32());
1245 Node* const p0 = m.Parameter(0);
1246 Node* const p1 = m.Parameter(1);
1247 m.Return(
1248 m.Word32Xor(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
1249 Stream s = m.Build();
1250 ASSERT_EQ(1U, s.size());
1251 EXPECT_EQ(kX64Xor32, s[0]->arch_opcode());
1252 ASSERT_EQ(3U, s[0]->InputCount());
1253 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
1254 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
1255 }
1256
1257 TEST_F(InstructionSelectorTest, LoadAdd32) {
1258 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
1259 MachineType::Int32());
1260 Node* const p0 = m.Parameter(0);
1261 Node* const p1 = m.Parameter(1);
1262 m.Return(
1263 m.Int32Add(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
1264 Stream s = m.Build();
1265 // Use lea instead of add, so memory operand is invalid.
1266 ASSERT_EQ(2U, s.size());
1267 EXPECT_EQ(kX64Movl, s[0]->arch_opcode());
1268 EXPECT_EQ(kX64Lea32, s[1]->arch_opcode());
1269 }
1270
1271 TEST_F(InstructionSelectorTest, LoadSub32) {
1272 StreamBuilder m(this, MachineType::Int32(), MachineType::Int32(),
1273 MachineType::Int32());
1274 Node* const p0 = m.Parameter(0);
1275 Node* const p1 = m.Parameter(1);
1276 m.Return(
1277 m.Int32Sub(p0, m.Load(MachineType::Int32(), p1, m.Int32Constant(127))));
1278 Stream s = m.Build();
1279 ASSERT_EQ(1U, s.size());
1280 EXPECT_EQ(kX64Sub32, s[0]->arch_opcode());
1281 ASSERT_EQ(3U, s[0]->InputCount());
1282 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
1283 EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1)));
1284 }
1285
1286 // -----------------------------------------------------------------------------
1210 // Floating point operations. 1287 // Floating point operations.
1211 1288
1212
1213 TEST_F(InstructionSelectorTest, Float32Abs) { 1289 TEST_F(InstructionSelectorTest, Float32Abs) {
1214 { 1290 {
1215 StreamBuilder m(this, MachineType::Float32(), MachineType::Float32()); 1291 StreamBuilder m(this, MachineType::Float32(), MachineType::Float32());
1216 Node* const p0 = m.Parameter(0); 1292 Node* const p0 = m.Parameter(0);
1217 Node* const n = m.Float32Abs(p0); 1293 Node* const n = m.Float32Abs(p0);
1218 m.Return(n); 1294 m.Return(n);
1219 Stream s = m.Build(); 1295 Stream s = m.Build();
1220 ASSERT_EQ(1U, s.size()); 1296 ASSERT_EQ(1U, s.size());
1221 EXPECT_EQ(kSSEFloat32Abs, s[0]->arch_opcode()); 1297 EXPECT_EQ(kSSEFloat32Abs, s[0]->arch_opcode());
1222 ASSERT_EQ(1U, s[0]->InputCount()); 1298 ASSERT_EQ(1U, s[0]->InputCount());
(...skipping 266 matching lines...) Expand 10 before | Expand all | Expand 10 after
1489 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 1565 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
1490 EXPECT_EQ(4, s.ToInt32(s[0]->InputAt(1))); 1566 EXPECT_EQ(4, s.ToInt32(s[0]->InputAt(1)));
1491 ASSERT_EQ(1U, s[0]->OutputCount()); 1567 ASSERT_EQ(1U, s[0]->OutputCount());
1492 EXPECT_EQ(s.ToVreg(shift), s.ToVreg(s[0]->Output())); 1568 EXPECT_EQ(s.ToVreg(shift), s.ToVreg(s[0]->Output()));
1493 } 1569 }
1494 } 1570 }
1495 1571
1496 } // namespace compiler 1572 } // namespace compiler
1497 } // namespace internal 1573 } // namespace internal
1498 } // namespace v8 1574 } // namespace v8
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