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Side by Side Diff: src/opts/opts_check_x86.cpp

Issue 272503006: Improved x86 SSE build and run-time checks. (Closed) Base URL: https://skia.googlesource.com/skia.git@master
Patch Set: Created 6 years, 7 months ago
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1 /* 1 /*
2 * Copyright 2009 The Android Open Source Project 2 * Copyright 2009 The Android Open Source Project
3 * 3 *
4 * Use of this source code is governed by a BSD-style license that can be 4 * Use of this source code is governed by a BSD-style license that can be
5 * found in the LICENSE file. 5 * found in the LICENSE file.
6 */ 6 */
7 7
8 #include "SkBitmapFilter_opts_SSE2.h" 8 #include "SkBitmapFilter_opts_SSE2.h"
9 #include "SkBitmapProcState_opts_SSE2.h" 9 #include "SkBitmapProcState_opts_SSE2.h"
10 #include "SkBitmapProcState_opts_SSSE3.h" 10 #include "SkBitmapProcState_opts_SSSE3.h"
11 #include "SkBlitMask.h" 11 #include "SkBlitMask.h"
12 #include "SkBlitRect_opts_SSE2.h" 12 #include "SkBlitRect_opts_SSE2.h"
13 #include "SkBlitRow.h" 13 #include "SkBlitRow.h"
14 #include "SkBlitRow_opts_SSE2.h" 14 #include "SkBlitRow_opts_SSE2.h"
15 #include "SkBlurImage_opts_SSE2.h" 15 #include "SkBlurImage_opts_SSE2.h"
16 #include "SkMorphology_opts.h" 16 #include "SkMorphology_opts.h"
17 #include "SkMorphology_opts_SSE2.h" 17 #include "SkMorphology_opts_SSE2.h"
18 #include "SkRTConf.h" 18 #include "SkRTConf.h"
19 #include "SkUtils.h" 19 #include "SkUtils.h"
20 #include "SkUtils_opts_SSE2.h" 20 #include "SkUtils_opts_SSE2.h"
21 #include "SkXfermode.h" 21 #include "SkXfermode.h"
22 #include "SkXfermode_proccoeff.h" 22 #include "SkXfermode_proccoeff.h"
23 23
24 #if defined(_MSC_VER) && defined(_WIN64) 24 #if defined(_MSC_VER) && defined(_WIN64)
25 #include <intrin.h> 25 #include <intrin.h>
26 #endif 26 #endif
27 27
28 /* This file must *not* be compiled with -msse or -msse2, otherwise 28 /* This file must *not* be compiled with -msse or any other optional SIMD
29 gcc may generate sse2 even for scalar ops (and thus give an invalid 29 extension, otherwise gcc may generate SIMD instructions even for scalar ops
30 instruction on Pentium3 on the code below). Only files named *_SSE2.cpp 30 (and thus give an invalid instruction on Pentium3 on the code below).
31 in this directory should be compiled with -msse2. */ 31 For example, only files named *_SSE2.cpp in this directory should be
32 compiled with -msse2 or higher. */
32 33
33 34
34 /* Function to get the CPU SSE-level in runtime, for different compilers. */ 35 /* Function to get the CPU SSE-level in runtime, for different compilers. */
35 #ifdef _MSC_VER 36 #ifdef _MSC_VER
36 static inline void getcpuid(int info_type, int info[4]) { 37 static inline void getcpuid(int info_type, int info[4]) {
37 #if defined(_WIN64) 38 #if defined(_WIN64)
38 __cpuid(info, info_type); 39 __cpuid(info, info_type);
39 #else 40 #else
40 __asm { 41 __asm {
41 mov eax, [info_type] 42 mov eax, [info_type]
42 cpuid 43 cpuid
43 mov edi, [info] 44 mov edi, [info]
44 mov [edi], eax 45 mov [edi], eax
45 mov [edi+4], ebx 46 mov [edi+4], ebx
46 mov [edi+8], ecx 47 mov [edi+8], ecx
47 mov [edi+12], edx 48 mov [edi+12], edx
48 } 49 }
49 #endif 50 #endif
50 } 51 }
51 #else 52 #elif defined(__x86_64__)
52 #if defined(__x86_64__)
53 static inline void getcpuid(int info_type, int info[4]) { 53 static inline void getcpuid(int info_type, int info[4]) {
54 asm volatile ( 54 asm volatile (
55 "cpuid \n\t" 55 "cpuid \n\t"
56 : "=a"(info[0]), "=b"(info[1]), "=c"(info[2]), "=d"(info[3]) 56 : "=a"(info[0]), "=b"(info[1]), "=c"(info[2]), "=d"(info[3])
57 : "a"(info_type) 57 : "a"(info_type)
58 ); 58 );
59 } 59 }
60 #else 60 #else
61 static inline void getcpuid(int info_type, int info[4]) { 61 static inline void getcpuid(int info_type, int info[4]) {
62 // We save and restore ebx, so this code can be compatible with -fPIC 62 // We save and restore ebx, so this code can be compatible with -fPIC
63 asm volatile ( 63 asm volatile (
64 "pushl %%ebx \n\t" 64 "pushl %%ebx \n\t"
65 "cpuid \n\t" 65 "cpuid \n\t"
66 "movl %%ebx, %1 \n\t" 66 "movl %%ebx, %1 \n\t"
67 "popl %%ebx \n\t" 67 "popl %%ebx \n\t"
68 : "=a"(info[0]), "=r"(info[1]), "=c"(info[2]), "=d"(info[3]) 68 : "=a"(info[0]), "=r"(info[1]), "=c"(info[2]), "=d"(info[3])
69 : "a"(info_type) 69 : "a"(info_type)
70 ); 70 );
71 } 71 }
72 #endif 72 #endif
73 #endif
74 73
75 //////////////////////////////////////////////////////////////////////////////// 74 ////////////////////////////////////////////////////////////////////////////////
76 75
77 #if defined(__x86_64__) || defined(_WIN64) || SK_CPU_SSE_LEVEL >= SK_CPU_SSE_LEV EL_SSE2 76 /* For the Android framework we should always know at compile time if the device
78 /* All x86_64 machines have SSE2, or we know it's supported at compile time, so don't even bother checking. */ 77 * we are building for supports SSSE3. The one exception to this rule is on the
79 static inline bool hasSSE2() { 78 * emulator where we are compiled without the -mssse3 option (so we have no
80 return true; 79 * SSSE3 procs) but can be run on a host machine that supports SSSE3
81 } 80 * instructions. So for that particular case we disable our SSSE3 options.
82 #else 81 */
83 82 #if defined(SK_BUILD_FOR_ANDROID_FRAMEWORK)
84 static inline bool hasSSE2() { 83 #define SK_DISABLE_RUNTIME_SIMD_CHECK
85 int cpu_info[4] = { 0 };
86 getcpuid(1, cpu_info);
87 return (cpu_info[3] & (1<<26)) != 0;
88 }
89 #endif 84 #endif
90 85
91 #if SK_CPU_SSE_LEVEL >= SK_CPU_SSE_LEVEL_SSSE3 86 /* Fetch the SIMD level directly from the CPU, at run-time.
92 /* If we know SSSE3 is supported at compile time, don't even bother checking. */ 87 * Only checks the levels needed by the optimizations in this file.
93 static inline bool hasSSSE3() {
94 return true;
95 }
96 #elif defined(SK_BUILD_FOR_ANDROID_FRAMEWORK)
97 /* For the Android framework we should always know at compile time if the device
98 * we are building for supports SSSE3. The one exception to this rule is on the
99 * emulator where we are compiled without the -msse3 option (so we have no SSSE3
100 * procs) but can be run on a host machine that supports SSSE3 instructions. So
101 * for that particular case we disable our SSSE3 options.
102 */ 88 */
103 static inline bool hasSSSE3() { 89 static int getSIMDLevel() {
104 return false; 90 int cpu_info[4] = { 0 };
105 }
106 #else
107 91
108 static inline bool hasSSSE3() {
109 int cpu_info[4] = { 0 };
110 getcpuid(1, cpu_info); 92 getcpuid(1, cpu_info);
111 return (cpu_info[2] & 0x200) != 0; 93 if ((cpu_info[2] & (1<<20)) != 0) {
112 } 94 return SK_CPU_SSE_LEVEL_SSE42;
113 #endif 95 } else if ((cpu_info[2] & (1<<9)) != 0) {
114 96 return SK_CPU_SSE_LEVEL_SSSE3;
115 static bool cachedHasSSE2() { 97 } else if ((cpu_info[3] & (1<<26)) != 0) {
116 static bool gHasSSE2 = hasSSE2(); 98 return SK_CPU_SSE_LEVEL_SSE2;
117 return gHasSSE2; 99 } else {
100 return 0;
101 }
118 } 102 }
119 103
120 static bool cachedHasSSSE3() { 104 /* Verify that the requested SIMD level exists in the build.
121 static bool gHasSSSE3 = hasSSSE3(); 105 * If not, check if the platform supports it.
122 return gHasSSSE3; 106 */
107 static inline bool verifySIMDLevel(int minLevel) {
mtklein 2014/05/07 17:34:41 verify reads me to me like an assert. Can we name
henrik.smiding 2014/05/08 11:02:46 Done. Changed to supports_simd, since it's more fu
108 if (minLevel <= SK_CPU_SSE_LEVEL) {
109 return true;
110 } else {
111 #if defined(SK_DISABLE_RUNTIME_SIMD_CHECK)
mtklein 2014/05/07 17:34:41 Just for parsimony, until we get another reason to
henrik.smiding 2014/05/08 11:02:46 Done.
112 return false;
113 #else
114 static int gSIMDLevel = getSIMDLevel();
115 return (minLevel <= gSIMDLevel);
116 #endif
117 }
123 } 118 }
124 119
125 //////////////////////////////////////////////////////////////////////////////// 120 ////////////////////////////////////////////////////////////////////////////////
126 121
127 SK_CONF_DECLARE( bool, c_hqfilter_sse, "bitmap.filter.highQualitySSE", false, "U se SSE optimized version of high quality image filters"); 122 SK_CONF_DECLARE( bool, c_hqfilter_sse, "bitmap.filter.highQualitySSE", false, "U se SSE optimized version of high quality image filters");
128 123
129 void SkBitmapProcState::platformConvolutionProcs(SkConvolutionProcs* procs) { 124 void SkBitmapProcState::platformConvolutionProcs(SkConvolutionProcs* procs) {
130 if (cachedHasSSE2()) { 125 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
131 procs->fExtraHorizontalReads = 3; 126 procs->fExtraHorizontalReads = 3;
132 procs->fConvolveVertically = &convolveVertically_SSE2; 127 procs->fConvolveVertically = &convolveVertically_SSE2;
133 procs->fConvolve4RowsHorizontally = &convolve4RowsHorizontally_SSE2; 128 procs->fConvolve4RowsHorizontally = &convolve4RowsHorizontally_SSE2;
134 procs->fConvolveHorizontally = &convolveHorizontally_SSE2; 129 procs->fConvolveHorizontally = &convolveHorizontally_SSE2;
135 procs->fApplySIMDPadding = &applySIMDPadding_SSE2; 130 procs->fApplySIMDPadding = &applySIMDPadding_SSE2;
136 } 131 }
137 } 132 }
138 133
139 //////////////////////////////////////////////////////////////////////////////// 134 ////////////////////////////////////////////////////////////////////////////////
140 135
141 void SkBitmapProcState::platformProcs() { 136 void SkBitmapProcState::platformProcs() {
142 /* Every optimization in the function requires at least SSE2 */ 137 /* Every optimization in the function requires at least SSE2 */
143 if (!cachedHasSSE2()) { 138 if (!verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
144 return; 139 return;
145 } 140 }
146 141
147 /* Check fSampleProc32 */ 142 /* Check fSampleProc32 */
148 if (fSampleProc32 == S32_opaque_D32_filter_DX) { 143 if (fSampleProc32 == S32_opaque_D32_filter_DX) {
149 if (cachedHasSSSE3()) { 144 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSSE3)) {
150 fSampleProc32 = S32_opaque_D32_filter_DX_SSSE3; 145 fSampleProc32 = S32_opaque_D32_filter_DX_SSSE3;
151 } else { 146 } else {
152 fSampleProc32 = S32_opaque_D32_filter_DX_SSE2; 147 fSampleProc32 = S32_opaque_D32_filter_DX_SSE2;
153 } 148 }
154 } else if (fSampleProc32 == S32_opaque_D32_filter_DXDY) { 149 } else if (fSampleProc32 == S32_opaque_D32_filter_DXDY) {
155 if (cachedHasSSSE3()) { 150 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSSE3)) {
156 fSampleProc32 = S32_opaque_D32_filter_DXDY_SSSE3; 151 fSampleProc32 = S32_opaque_D32_filter_DXDY_SSSE3;
157 } 152 }
158 } else if (fSampleProc32 == S32_alpha_D32_filter_DX) { 153 } else if (fSampleProc32 == S32_alpha_D32_filter_DX) {
159 if (cachedHasSSSE3()) { 154 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSSE3)) {
160 fSampleProc32 = S32_alpha_D32_filter_DX_SSSE3; 155 fSampleProc32 = S32_alpha_D32_filter_DX_SSSE3;
161 } else { 156 } else {
162 fSampleProc32 = S32_alpha_D32_filter_DX_SSE2; 157 fSampleProc32 = S32_alpha_D32_filter_DX_SSE2;
163 } 158 }
164 } else if (fSampleProc32 == S32_alpha_D32_filter_DXDY) { 159 } else if (fSampleProc32 == S32_alpha_D32_filter_DXDY) {
165 if (cachedHasSSSE3()) { 160 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSSE3)) {
166 fSampleProc32 = S32_alpha_D32_filter_DXDY_SSSE3; 161 fSampleProc32 = S32_alpha_D32_filter_DXDY_SSSE3;
167 } 162 }
168 } 163 }
169 164
170 /* Check fSampleProc16 */ 165 /* Check fSampleProc16 */
171 if (fSampleProc16 == S32_D16_filter_DX) { 166 if (fSampleProc16 == S32_D16_filter_DX) {
172 fSampleProc16 = S32_D16_filter_DX_SSE2; 167 fSampleProc16 = S32_D16_filter_DX_SSE2;
173 } 168 }
174 169
175 /* Check fMatrixProc */ 170 /* Check fMatrixProc */
(...skipping 22 matching lines...) Expand all
198 NULL, // S32_D565_Blend 193 NULL, // S32_D565_Blend
199 S32A_D565_Opaque_SSE2, // S32A_D565_Opaque 194 S32A_D565_Opaque_SSE2, // S32A_D565_Opaque
200 NULL, // S32A_D565_Blend 195 NULL, // S32A_D565_Blend
201 S32_D565_Opaque_Dither_SSE2, // S32_D565_Opaque_Dither 196 S32_D565_Opaque_Dither_SSE2, // S32_D565_Opaque_Dither
202 NULL, // S32_D565_Blend_Dither 197 NULL, // S32_D565_Blend_Dither
203 S32A_D565_Opaque_Dither_SSE2, // S32A_D565_Opaque_Dither 198 S32A_D565_Opaque_Dither_SSE2, // S32A_D565_Opaque_Dither
204 NULL, // S32A_D565_Blend_Dither 199 NULL, // S32A_D565_Blend_Dither
205 }; 200 };
206 201
207 SkBlitRow::Proc SkBlitRow::PlatformProcs565(unsigned flags) { 202 SkBlitRow::Proc SkBlitRow::PlatformProcs565(unsigned flags) {
208 if (cachedHasSSE2()) { 203 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
209 return platform_16_procs[flags]; 204 return platform_16_procs[flags];
210 } else { 205 } else {
211 return NULL; 206 return NULL;
212 } 207 }
213 } 208 }
214 209
215 static SkBlitRow::Proc32 platform_32_procs[] = { 210 static SkBlitRow::Proc32 platform_32_procs[] = {
216 NULL, // S32_Opaque, 211 NULL, // S32_Opaque,
217 S32_Blend_BlitRow32_SSE2, // S32_Blend, 212 S32_Blend_BlitRow32_SSE2, // S32_Blend,
218 S32A_Opaque_BlitRow32_SSE2, // S32A_Opaque 213 S32A_Opaque_BlitRow32_SSE2, // S32A_Opaque
219 S32A_Blend_BlitRow32_SSE2, // S32A_Blend, 214 S32A_Blend_BlitRow32_SSE2, // S32A_Blend,
220 }; 215 };
221 216
222 SkBlitRow::Proc32 SkBlitRow::PlatformProcs32(unsigned flags) { 217 SkBlitRow::Proc32 SkBlitRow::PlatformProcs32(unsigned flags) {
223 if (cachedHasSSE2()) { 218 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
224 return platform_32_procs[flags]; 219 return platform_32_procs[flags];
225 } else { 220 } else {
226 return NULL; 221 return NULL;
227 } 222 }
228 } 223 }
229 224
230 SkBlitRow::ColorProc SkBlitRow::PlatformColorProc() { 225 SkBlitRow::ColorProc SkBlitRow::PlatformColorProc() {
231 if (cachedHasSSE2()) { 226 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
232 return Color32_SSE2; 227 return Color32_SSE2;
233 } else { 228 } else {
234 return NULL; 229 return NULL;
235 } 230 }
236 } 231 }
237 232
238 SkBlitRow::ColorRectProc PlatformColorRectProcFactory(); // suppress warning 233 SkBlitRow::ColorRectProc PlatformColorRectProcFactory(); // suppress warning
239 234
240 SkBlitRow::ColorRectProc PlatformColorRectProcFactory() { 235 SkBlitRow::ColorRectProc PlatformColorRectProcFactory() {
241 /* Return NULL for now, since the optimized path in ColorRect32_SSE2 is disabled . 236 /* Return NULL for now, since the optimized path in ColorRect32_SSE2 is disabled .
242 if (cachedHasSSE2()) { 237 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
243 return ColorRect32_SSE2; 238 return ColorRect32_SSE2;
244 } else { 239 } else {
245 return NULL; 240 return NULL;
246 } 241 }
247 */ 242 */
248 return NULL; 243 return NULL;
249 } 244 }
250 245
251 //////////////////////////////////////////////////////////////////////////////// 246 ////////////////////////////////////////////////////////////////////////////////
252 247
253 SkBlitMask::ColorProc SkBlitMask::PlatformColorProcs(SkBitmap::Config dstConfig, 248 SkBlitMask::ColorProc SkBlitMask::PlatformColorProcs(SkBitmap::Config dstConfig,
254 SkMask::Format maskFormat, 249 SkMask::Format maskFormat,
255 SkColor color) { 250 SkColor color) {
256 if (SkMask::kA8_Format != maskFormat) { 251 if (SkMask::kA8_Format != maskFormat) {
257 return NULL; 252 return NULL;
258 } 253 }
259 254
260 ColorProc proc = NULL; 255 ColorProc proc = NULL;
261 if (cachedHasSSE2()) { 256 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
262 switch (dstConfig) { 257 switch (dstConfig) {
263 case SkBitmap::kARGB_8888_Config: 258 case SkBitmap::kARGB_8888_Config:
264 // The SSE2 version is not (yet) faster for black, so we check 259 // The SSE2 version is not (yet) faster for black, so we check
265 // for that. 260 // for that.
266 if (SK_ColorBLACK != color) { 261 if (SK_ColorBLACK != color) {
267 proc = SkARGB32_A8_BlitMask_SSE2; 262 proc = SkARGB32_A8_BlitMask_SSE2;
268 } 263 }
269 break; 264 break;
270 default: 265 default:
271 break; 266 break;
272 } 267 }
273 } 268 }
274 return proc; 269 return proc;
275 } 270 }
276 271
277 SkBlitMask::BlitLCD16RowProc SkBlitMask::PlatformBlitRowProcs16(bool isOpaque) { 272 SkBlitMask::BlitLCD16RowProc SkBlitMask::PlatformBlitRowProcs16(bool isOpaque) {
278 if (cachedHasSSE2()) { 273 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
279 if (isOpaque) { 274 if (isOpaque) {
280 return SkBlitLCD16OpaqueRow_SSE2; 275 return SkBlitLCD16OpaqueRow_SSE2;
281 } else { 276 } else {
282 return SkBlitLCD16Row_SSE2; 277 return SkBlitLCD16Row_SSE2;
283 } 278 }
284 } else { 279 } else {
285 return NULL; 280 return NULL;
286 } 281 }
287 282
288 } 283 }
289 284
290 SkBlitMask::RowProc SkBlitMask::PlatformRowProcs(SkBitmap::Config dstConfig, 285 SkBlitMask::RowProc SkBlitMask::PlatformRowProcs(SkBitmap::Config dstConfig,
291 SkMask::Format maskFormat, 286 SkMask::Format maskFormat,
292 RowFlags flags) { 287 RowFlags flags) {
293 return NULL; 288 return NULL;
294 } 289 }
295 290
296 //////////////////////////////////////////////////////////////////////////////// 291 ////////////////////////////////////////////////////////////////////////////////
297 292
298 SkMemset16Proc SkMemset16GetPlatformProc() { 293 SkMemset16Proc SkMemset16GetPlatformProc() {
299 if (cachedHasSSE2()) { 294 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
300 return sk_memset16_SSE2; 295 return sk_memset16_SSE2;
301 } else { 296 } else {
302 return NULL; 297 return NULL;
303 } 298 }
304 } 299 }
305 300
306 SkMemset32Proc SkMemset32GetPlatformProc() { 301 SkMemset32Proc SkMemset32GetPlatformProc() {
307 if (cachedHasSSE2()) { 302 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
308 return sk_memset32_SSE2; 303 return sk_memset32_SSE2;
309 } else { 304 } else {
310 return NULL; 305 return NULL;
311 } 306 }
312 } 307 }
313 308
314 //////////////////////////////////////////////////////////////////////////////// 309 ////////////////////////////////////////////////////////////////////////////////
315 310
316 SkMorphologyImageFilter::Proc SkMorphologyGetPlatformProc(SkMorphologyProcType t ype) { 311 SkMorphologyImageFilter::Proc SkMorphologyGetPlatformProc(SkMorphologyProcType t ype) {
317 if (!cachedHasSSE2()) { 312 if (!verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
318 return NULL; 313 return NULL;
319 } 314 }
320 switch (type) { 315 switch (type) {
321 case kDilateX_SkMorphologyProcType: 316 case kDilateX_SkMorphologyProcType:
322 return SkDilateX_SSE2; 317 return SkDilateX_SSE2;
323 case kDilateY_SkMorphologyProcType: 318 case kDilateY_SkMorphologyProcType:
324 return SkDilateY_SSE2; 319 return SkDilateY_SSE2;
325 case kErodeX_SkMorphologyProcType: 320 case kErodeX_SkMorphologyProcType:
326 return SkErodeX_SSE2; 321 return SkErodeX_SSE2;
327 case kErodeY_SkMorphologyProcType: 322 case kErodeY_SkMorphologyProcType:
328 return SkErodeY_SSE2; 323 return SkErodeY_SSE2;
329 default: 324 default:
330 return NULL; 325 return NULL;
331 } 326 }
332 } 327 }
333 328
334 //////////////////////////////////////////////////////////////////////////////// 329 ////////////////////////////////////////////////////////////////////////////////
335 330
336 bool SkBoxBlurGetPlatformProcs(SkBoxBlurProc* boxBlurX, 331 bool SkBoxBlurGetPlatformProcs(SkBoxBlurProc* boxBlurX,
337 SkBoxBlurProc* boxBlurY, 332 SkBoxBlurProc* boxBlurY,
338 SkBoxBlurProc* boxBlurXY, 333 SkBoxBlurProc* boxBlurXY,
339 SkBoxBlurProc* boxBlurYX) { 334 SkBoxBlurProc* boxBlurYX) {
340 #ifdef SK_DISABLE_BLUR_DIVISION_OPTIMIZATION 335 #ifdef SK_DISABLE_BLUR_DIVISION_OPTIMIZATION
341 return false; 336 return false;
342 #else 337 #else
343 if (!cachedHasSSE2()) { 338 if (!verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
344 return false; 339 return false;
345 } 340 }
346 return SkBoxBlurGetPlatformProcs_SSE2(boxBlurX, boxBlurY, boxBlurXY, boxBlur YX); 341 return SkBoxBlurGetPlatformProcs_SSE2(boxBlurX, boxBlurY, boxBlurXY, boxBlur YX);
347 #endif 342 #endif
348 } 343 }
349 344
350 //////////////////////////////////////////////////////////////////////////////// 345 ////////////////////////////////////////////////////////////////////////////////
351 346
352 extern SkProcCoeffXfermode* SkPlatformXfermodeFactory_impl_SSE2(const ProcCoeff& rec, 347 extern SkProcCoeffXfermode* SkPlatformXfermodeFactory_impl_SSE2(const ProcCoeff& rec,
353 SkXfermode::Mode mode); 348 SkXfermode::Mode mode);
354 349
355 SkProcCoeffXfermode* SkPlatformXfermodeFactory_impl(const ProcCoeff& rec, 350 SkProcCoeffXfermode* SkPlatformXfermodeFactory_impl(const ProcCoeff& rec,
356 SkXfermode::Mode mode); 351 SkXfermode::Mode mode);
357 352
358 SkProcCoeffXfermode* SkPlatformXfermodeFactory_impl(const ProcCoeff& rec, 353 SkProcCoeffXfermode* SkPlatformXfermodeFactory_impl(const ProcCoeff& rec,
359 SkXfermode::Mode mode) { 354 SkXfermode::Mode mode) {
360 return NULL; 355 return NULL;
361 } 356 }
362 357
363 SkProcCoeffXfermode* SkPlatformXfermodeFactory(const ProcCoeff& rec, 358 SkProcCoeffXfermode* SkPlatformXfermodeFactory(const ProcCoeff& rec,
364 SkXfermode::Mode mode); 359 SkXfermode::Mode mode);
365 360
366 SkProcCoeffXfermode* SkPlatformXfermodeFactory(const ProcCoeff& rec, 361 SkProcCoeffXfermode* SkPlatformXfermodeFactory(const ProcCoeff& rec,
367 SkXfermode::Mode mode) { 362 SkXfermode::Mode mode) {
368 if (cachedHasSSE2()) { 363 if (verifySIMDLevel(SK_CPU_SSE_LEVEL_SSE2)) {
369 return SkPlatformXfermodeFactory_impl_SSE2(rec, mode); 364 return SkPlatformXfermodeFactory_impl_SSE2(rec, mode);
370 } else { 365 } else {
371 return SkPlatformXfermodeFactory_impl(rec, mode); 366 return SkPlatformXfermodeFactory_impl(rec, mode);
372 } 367 }
373 } 368 }
374 369
375 SkXfermodeProc SkPlatformXfermodeProcFactory(SkXfermode::Mode mode); 370 SkXfermodeProc SkPlatformXfermodeProcFactory(SkXfermode::Mode mode);
376 371
377 SkXfermodeProc SkPlatformXfermodeProcFactory(SkXfermode::Mode mode) { 372 SkXfermodeProc SkPlatformXfermodeProcFactory(SkXfermode::Mode mode) {
378 return NULL; 373 return NULL;
379 } 374 }
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