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Issue 2722313003: s390: optimize for int 64-bit operation and cleanup (Closed)
Patch Set: Created 3 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1837 // GPR <-> FPR Instructions 1837 // GPR <-> FPR Instructions
1838 1838
1839 // Floating point instructions 1839 // Floating point instructions
1840 // 1840 //
1841 // Add Register-Storage (LB) 1841 // Add Register-Storage (LB)
1842 void Assembler::adb(DoubleRegister r1, const MemOperand& opnd) { 1842 void Assembler::adb(DoubleRegister r1, const MemOperand& opnd) {
1843 rxe_form(ADB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), 1843 rxe_form(ADB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1844 opnd.offset()); 1844 opnd.offset());
1845 } 1845 }
1846 1846
1847 // Add Register-Storage (LB)
1848 void Assembler::aeb(DoubleRegister r1, const MemOperand& opnd) {
1849 rxe_form(AEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1850 opnd.offset());
1851 }
1852
1853 // Sub Register-Storage (LB)
1854 void Assembler::seb(DoubleRegister r1, const MemOperand& opnd) {
1855 rxe_form(SEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1856 opnd.offset());
1857 }
1858
1847 // Divide Register-Storage (LB) 1859 // Divide Register-Storage (LB)
1848 void Assembler::ddb(DoubleRegister r1, const MemOperand& opnd) { 1860 void Assembler::ddb(DoubleRegister r1, const MemOperand& opnd) {
1849 rxe_form(DDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), 1861 rxe_form(DDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1850 opnd.offset()); 1862 opnd.offset());
1851 } 1863 }
1852 1864
1865 // Divide Register-Storage (LB)
1866 void Assembler::deb(DoubleRegister r1, const MemOperand& opnd) {
1867 rxe_form(DEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1868 opnd.offset());
1869 }
1870
1853 // Multiply Register-Storage (LB) 1871 // Multiply Register-Storage (LB)
1854 void Assembler::mdb(DoubleRegister r1, const MemOperand& opnd) { 1872 void Assembler::mdb(DoubleRegister r1, const MemOperand& opnd) {
1855 rxe_form(MDB, Register::from_code(r1.code()), opnd.rb(), opnd.rx(), 1873 rxe_form(MDB, Register::from_code(r1.code()), opnd.rb(), opnd.rx(),
1856 opnd.offset()); 1874 opnd.offset());
1857 } 1875 }
1858 1876
1877 // Multiply Register-Storage (LB)
1878 void Assembler::meeb(DoubleRegister r1, const MemOperand& opnd) {
1879 rxe_form(MEEB, Register::from_code(r1.code()), opnd.rb(), opnd.rx(),
1880 opnd.offset());
1881 }
1882
1859 // Subtract Register-Storage (LB) 1883 // Subtract Register-Storage (LB)
1860 void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) { 1884 void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) {
1861 rxe_form(SDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), 1885 rxe_form(SDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1862 opnd.offset()); 1886 opnd.offset());
1863 } 1887 }
1864 1888
1865 void Assembler::ceb(DoubleRegister r1, const MemOperand& opnd) { 1889 void Assembler::ceb(DoubleRegister r1, const MemOperand& opnd) {
1866 rxe_form(CEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), 1890 rxe_form(CEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
1867 opnd.offset()); 1891 opnd.offset());
1868 } 1892 }
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2122 SKIP_ICACHE_FLUSH); 2146 SKIP_ICACHE_FLUSH);
2123 } 2147 }
2124 2148
2125 reloc_info_writer.Write(&rinfo); 2149 reloc_info_writer.Write(&rinfo);
2126 } 2150 }
2127 } 2151 }
2128 2152
2129 } // namespace internal 2153 } // namespace internal
2130 } // namespace v8 2154 } // namespace v8
2131 #endif // V8_TARGET_ARCH_S390 2155 #endif // V8_TARGET_ARCH_S390
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