Add Int32x4 Wasm Simd Binops, compare ops, select

src/compiler/instruction-selector.cc

Index: src/compiler/instruction-selector.cc
diff --git a/src/compiler/instruction-selector.cc b/src/compiler/instruction-selector.cc
index c49e399b9393a2174f9c719c9e04c2fbba1ff025..27693e16de96f7e75991d85030773f95d834ad52 100644
--- a/src/compiler/instruction-selector.cc
+++ b/src/compiler/instruction-selector.cc
@@ -2053,19 +2053,15 @@ void InstructionSelector::VisitInt32x4Sub(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
 
 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
-void InstructionSelector::VisitInt32x4Equal(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitInt32x4NotEqual(Node* node) { UNIMPLEMENTED(); }
-
 void InstructionSelector::VisitInt32x4Mul(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Max(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Min(Node* node) { UNIMPLEMENTED(); }
 
-void InstructionSelector::VisitUint32x4Max(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitInt32x4Equal(Node* node) { UNIMPLEMENTED(); }
 
-void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitInt32x4NotEqual(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4ShiftLeftByScalar(Node* node) {
   UNIMPLEMENTED();
@@ -2079,7 +2075,9 @@ void InstructionSelector::VisitUint32x4ShiftRightByScalar(Node* node) {
   UNIMPLEMENTED();
 }
 
-void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitUint32x4Max(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd128Zero(Node* node) { UNIMPLEMENTED(); }
 
@@ -2169,18 +2167,6 @@ void InstructionSelector::VisitInt32x4LessThanOrEqual(Node* node) {
   UNIMPLEMENTED();
 }
 
-void InstructionSelector::VisitInt32x4GreaterThan(Node* node) {
-  UNIMPLEMENTED();
-}
-
-void InstructionSelector::VisitInt32x4GreaterThanOrEqual(Node* node) {
-  UNIMPLEMENTED();
-}
-
-void InstructionSelector::VisitUint32x4GreaterThan(Node* node) {
-  UNIMPLEMENTED();
-}
-
 void InstructionSelector::VisitUint32x4LessThan(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitUint32x4LessThanOrEqual(Node* node) {
@@ -2334,7 +2320,13 @@ void InstructionSelector::VisitSimd128Or(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitSimd128Xor(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd128Not(Node* node) { UNIMPLEMENTED(); }
+#endif  // !V8_TARGET_ARCH_X64
+
+#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
+void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
+#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
 
+#if !V8_TARGET_ARCH_ARM
 void InstructionSelector::VisitSimd16x8Select(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd8x16Select(Node* node) { UNIMPLEMENTED(); }