Tweak Math.log on ia32/x64

src/ia32/lithium-gap-resolver-ia32.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 308 matching lines @@
       int32_t lower = static_cast<int32_t>(int_val);
       int32_t upper = static_cast<int32_t>(int_val >> kBitsPerInt);
       if (CpuFeatures::IsSupported(SSE2)) {
         CpuFeatureScope scope(cgen_->masm(), SSE2);
         XMMRegister dst = cgen_->ToDoubleRegister(destination);
         if (int_val == 0) {
           __ xorps(dst, dst);
         } else {
           __ push(Immediate(upper));
           __ push(Immediate(lower));
-          __ movdbl(dst, Operand(esp, 0));
+          __ movsd(dst, Operand(esp, 0));
           __ add(esp, Immediate(kDoubleSize));
         }
       } else {
         __ push(Immediate(upper));
         __ push(Immediate(lower));
         X87Register dst = cgen_->ToX87Register(destination);
         cgen_->X87Mov(dst, MemOperand(esp, 0));
         __ add(esp, Immediate(kDoubleSize));
       }
     } else {
@@ skipping 13 matching lines @@
   } else if (source->IsDoubleRegister()) {
     if (CpuFeatures::IsSupported(SSE2)) {
       CpuFeatureScope scope(cgen_->masm(), SSE2);
       XMMRegister src = cgen_->ToDoubleRegister(source);
       if (destination->IsDoubleRegister()) {
         XMMRegister dst = cgen_->ToDoubleRegister(destination);
         __ movaps(dst, src);
       } else {
         ASSERT(destination->IsDoubleStackSlot());
         Operand dst = cgen_->ToOperand(destination);
-        __ movdbl(dst, src);
+        __ movsd(dst, src);
       }
     } else {
       // load from the register onto the stack, store in destination, which must
       // be a double stack slot in the non-SSE2 case.
       ASSERT(destination->IsDoubleStackSlot());
       Operand dst = cgen_->ToOperand(destination);
       X87Register src = cgen_->ToX87Register(source);
       cgen_->X87Mov(dst, src);
     }
   } else if (source->IsDoubleStackSlot()) {
     if (CpuFeatures::IsSupported(SSE2)) {
       CpuFeatureScope scope(cgen_->masm(), SSE2);
       ASSERT(destination->IsDoubleRegister() ||
              destination->IsDoubleStackSlot());
       Operand src = cgen_->ToOperand(source);
       if (destination->IsDoubleRegister()) {
         XMMRegister dst = cgen_->ToDoubleRegister(destination);
-        __ movdbl(dst, src);
+        __ movsd(dst, src);
       } else {
         // We rely on having xmm0 available as a fixed scratch register.
         Operand dst = cgen_->ToOperand(destination);
-        __ movdbl(xmm0, src);
-        __ movdbl(dst, xmm0);
+        __ movsd(xmm0, src);
+        __ movsd(dst, xmm0);
       }
     } else {
       // load from the stack slot on top of the floating point stack, and then
       // store in destination. If destination is a double register, then it
       // represents the top of the stack and nothing needs to be done.
       if (destination->IsDoubleStackSlot()) {
         Register tmp = EnsureTempRegister();
         Operand src0 = cgen_->ToOperand(source);
         Operand src1 = cgen_->HighOperand(source);
         Operand dst0 = cgen_->ToOperand(destination);
@@ skipping 82 matching lines @@
   } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {
     CpuFeatureScope scope(cgen_->masm(), SSE2);
     // XMM register-memory swap.  We rely on having xmm0
     // available as a fixed scratch register.
     ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot());
     XMMRegister reg = cgen_->ToDoubleRegister(source->IsDoubleRegister()
                                               ? source
                                               : destination);
     Operand other =
         cgen_->ToOperand(source->IsDoubleRegister() ? destination : source);
-    __ movdbl(xmm0, other);
-    __ movdbl(other, reg);
-    __ movdbl(reg, Operand(xmm0));
+    __ movsd(xmm0, other);
+    __ movsd(other, reg);
+    __ movsd(reg, Operand(xmm0));
   } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) {
     CpuFeatureScope scope(cgen_->masm(), SSE2);
     // Double-width memory-to-memory.  Spill on demand to use a general
     // purpose temporary register and also rely on having xmm0 available as
     // a fixed scratch register.
     Register tmp = EnsureTempRegister();
     Operand src0 = cgen_->ToOperand(source);
     Operand src1 = cgen_->HighOperand(source);
     Operand dst0 = cgen_->ToOperand(destination);
     Operand dst1 = cgen_->HighOperand(destination);
-    __ movdbl(xmm0, dst0);  // Save destination in xmm0.
+    __ movsd(xmm0, dst0);  // Save destination in xmm0.
     __ mov(tmp, src0);  // Then use tmp to copy source to destination.
     __ mov(dst0, tmp);
     __ mov(tmp, src1);
     __ mov(dst1, tmp);
-    __ movdbl(src0, xmm0);
+    __ movsd(src0, xmm0);
 
   } else {
     // No other combinations are possible.
     UNREACHABLE();
   }
 
   // The swap of source and destination has executed a move from source to
   // destination.
   RemoveMove(index);
 
@@ skipping 22 matching lines @@
   } else if (destination->IsRegister()) {
     source_uses_[destination->index()] = CountSourceUses(destination);
   }
 }
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_IA32