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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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2060 | 2060 |
2061 void Assembler::xorps(XMMRegister dst, XMMRegister src) { | 2061 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
2062 EnsureSpace ensure_space(this); | 2062 EnsureSpace ensure_space(this); |
2063 EMIT(0x0F); | 2063 EMIT(0x0F); |
2064 EMIT(0x57); | 2064 EMIT(0x57); |
2065 emit_sse_operand(dst, src); | 2065 emit_sse_operand(dst, src); |
2066 } | 2066 } |
2067 | 2067 |
2068 | 2068 |
2069 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { | 2069 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { |
| 2070 ASSERT(IsEnabled(SSE2)); |
2070 EnsureSpace ensure_space(this); | 2071 EnsureSpace ensure_space(this); |
2071 EMIT(0xF2); | 2072 EMIT(0xF2); |
2072 EMIT(0x0F); | 2073 EMIT(0x0F); |
2073 EMIT(0x51); | 2074 EMIT(0x51); |
2074 emit_sse_operand(dst, src); | 2075 emit_sse_operand(dst, src); |
2075 } | 2076 } |
2076 | 2077 |
2077 | 2078 |
2078 void Assembler::andpd(XMMRegister dst, XMMRegister src) { | 2079 void Assembler::andpd(XMMRegister dst, XMMRegister src) { |
| 2080 ASSERT(IsEnabled(SSE2)); |
2079 EnsureSpace ensure_space(this); | 2081 EnsureSpace ensure_space(this); |
2080 EMIT(0x66); | 2082 EMIT(0x66); |
2081 EMIT(0x0F); | 2083 EMIT(0x0F); |
2082 EMIT(0x54); | 2084 EMIT(0x54); |
2083 emit_sse_operand(dst, src); | 2085 emit_sse_operand(dst, src); |
2084 } | 2086 } |
2085 | 2087 |
2086 | 2088 |
2087 void Assembler::orpd(XMMRegister dst, XMMRegister src) { | 2089 void Assembler::orpd(XMMRegister dst, XMMRegister src) { |
| 2090 ASSERT(IsEnabled(SSE2)); |
2088 EnsureSpace ensure_space(this); | 2091 EnsureSpace ensure_space(this); |
2089 EMIT(0x66); | 2092 EMIT(0x66); |
2090 EMIT(0x0F); | 2093 EMIT(0x0F); |
2091 EMIT(0x56); | 2094 EMIT(0x56); |
2092 emit_sse_operand(dst, src); | 2095 emit_sse_operand(dst, src); |
2093 } | 2096 } |
2094 | 2097 |
2095 | 2098 |
2096 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { | 2099 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { |
2097 ASSERT(IsEnabled(SSE2)); | 2100 ASSERT(IsEnabled(SSE2)); |
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2240 ASSERT(is_uint2(level)); | 2243 ASSERT(is_uint2(level)); |
2241 EnsureSpace ensure_space(this); | 2244 EnsureSpace ensure_space(this); |
2242 EMIT(0x0F); | 2245 EMIT(0x0F); |
2243 EMIT(0x18); | 2246 EMIT(0x18); |
2244 // Emit hint number in Reg position of RegR/M. | 2247 // Emit hint number in Reg position of RegR/M. |
2245 XMMRegister code = XMMRegister::from_code(level); | 2248 XMMRegister code = XMMRegister::from_code(level); |
2246 emit_sse_operand(code, src); | 2249 emit_sse_operand(code, src); |
2247 } | 2250 } |
2248 | 2251 |
2249 | 2252 |
2250 void Assembler::movdbl(XMMRegister dst, const Operand& src) { | |
2251 EnsureSpace ensure_space(this); | |
2252 movsd(dst, src); | |
2253 } | |
2254 | |
2255 | |
2256 void Assembler::movdbl(const Operand& dst, XMMRegister src) { | |
2257 EnsureSpace ensure_space(this); | |
2258 movsd(dst, src); | |
2259 } | |
2260 | |
2261 | |
2262 void Assembler::movsd(const Operand& dst, XMMRegister src ) { | 2253 void Assembler::movsd(const Operand& dst, XMMRegister src ) { |
2263 ASSERT(IsEnabled(SSE2)); | 2254 ASSERT(IsEnabled(SSE2)); |
2264 EnsureSpace ensure_space(this); | 2255 EnsureSpace ensure_space(this); |
2265 EMIT(0xF2); // double | 2256 EMIT(0xF2); // double |
2266 EMIT(0x0F); | 2257 EMIT(0x0F); |
2267 EMIT(0x11); // store | 2258 EMIT(0x11); // store |
2268 emit_sse_operand(src, dst); | 2259 emit_sse_operand(src, dst); |
2269 } | 2260 } |
2270 | 2261 |
2271 | 2262 |
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2689 fprintf(coverage_log, "%s\n", file_line); | 2680 fprintf(coverage_log, "%s\n", file_line); |
2690 fflush(coverage_log); | 2681 fflush(coverage_log); |
2691 } | 2682 } |
2692 } | 2683 } |
2693 | 2684 |
2694 #endif | 2685 #endif |
2695 | 2686 |
2696 } } // namespace v8::internal | 2687 } } // namespace v8::internal |
2697 | 2688 |
2698 #endif // V8_TARGET_ARCH_IA32 | 2689 #endif // V8_TARGET_ARCH_IA32 |
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