Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(266)

Side by Side Diff: src/compiler/x64/instruction-codes-x64.h

Issue 2719483002: [V8] Rename SIMD Create methods and add initialization operators. (Closed)
Patch Set: Created 3 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 128 matching lines...) Expand 10 before | Expand all | Expand 10 after
139 V(X64Lea32) \ 139 V(X64Lea32) \
140 V(X64Lea) \ 140 V(X64Lea) \
141 V(X64Dec32) \ 141 V(X64Dec32) \
142 V(X64Inc32) \ 142 V(X64Inc32) \
143 V(X64Push) \ 143 V(X64Push) \
144 V(X64Poke) \ 144 V(X64Poke) \
145 V(X64StackCheck) \ 145 V(X64StackCheck) \
146 V(X64Xchgb) \ 146 V(X64Xchgb) \
147 V(X64Xchgw) \ 147 V(X64Xchgw) \
148 V(X64Xchgl) \ 148 V(X64Xchgl) \
149 V(X64Int32x4Create) \ 149 V(X64Int32x4Splat) \
150 V(X64Int32x4ExtractLane) \ 150 V(X64Int32x4ExtractLane) \
151 V(X64Int32x4ReplaceLane) \ 151 V(X64Int32x4ReplaceLane) \
152 V(X64Int32x4Add) \ 152 V(X64Int32x4Add) \
153 V(X64Int32x4Sub) 153 V(X64Int32x4Sub) \
154 V(X64Simd128Zero)
154 155
155 // Addressing modes represent the "shape" of inputs to an instruction. 156 // Addressing modes represent the "shape" of inputs to an instruction.
156 // Many instructions support multiple addressing modes. Addressing modes 157 // Many instructions support multiple addressing modes. Addressing modes
157 // are encoded into the InstructionCode of the instruction and tell the 158 // are encoded into the InstructionCode of the instruction and tell the
158 // code generator after register allocation which assembler method to call. 159 // code generator after register allocation which assembler method to call.
159 // 160 //
160 // We use the following local notation for addressing modes: 161 // We use the following local notation for addressing modes:
161 // 162 //
162 // M = memory operand 163 // M = memory operand
163 // R = base register 164 // R = base register
(...skipping 21 matching lines...) Expand all
185 V(M8I) /* [ %r2*8 + K] */ \ 186 V(M8I) /* [ %r2*8 + K] */ \
186 V(Root) /* [%root + K] */ 187 V(Root) /* [%root + K] */
187 188
188 enum X64MemoryProtection { kUnprotected = 0, kProtected = 1 }; 189 enum X64MemoryProtection { kUnprotected = 0, kProtected = 1 };
189 190
190 } // namespace compiler 191 } // namespace compiler
191 } // namespace internal 192 } // namespace internal
192 } // namespace v8 193 } // namespace v8
193 194
194 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ 195 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
OLDNEW

Powered by Google App Engine
This is Rietveld 408576698