[V8] Rename SIMD Create methods and add initialization operators.

src/compiler/instruction-selector.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector.h"
 
 #include <limits>
 
 #include "src/base/adapters.h"
 #include "src/compiler/compiler-source-position-table.h"
@@ skipping 1438 matching lines @@
     case IrOpcode::kAtomicStore:
       return VisitAtomicStore(node);
     case IrOpcode::kProtectedLoad: {
       LoadRepresentation type = LoadRepresentationOf(node->op());
       MarkAsRepresentation(type.representation(), node);
       return VisitProtectedLoad(node);
     }
     case IrOpcode::kUnsafePointerAdd:
       MarkAsRepresentation(MachineType::PointerRepresentation(), node);
       return VisitUnsafePointerAdd(node);
-    case IrOpcode::kCreateFloat32x4:
-      return MarkAsSimd128(node), VisitCreateFloat32x4(node);
+    case IrOpcode::kFloat32x4Splat:
+      return MarkAsSimd128(node), VisitFloat32x4Splat(node);
     case IrOpcode::kFloat32x4ExtractLane:
       return MarkAsFloat32(node), VisitFloat32x4ExtractLane(node);
     case IrOpcode::kFloat32x4ReplaceLane:
       return MarkAsSimd128(node), VisitFloat32x4ReplaceLane(node);
     case IrOpcode::kFloat32x4FromInt32x4:
       return MarkAsSimd128(node), VisitFloat32x4FromInt32x4(node);
     case IrOpcode::kFloat32x4FromUint32x4:
       return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node);
     case IrOpcode::kFloat32x4Abs:
       return MarkAsSimd128(node), VisitFloat32x4Abs(node);
     case IrOpcode::kFloat32x4Neg:
       return MarkAsSimd128(node), VisitFloat32x4Neg(node);
     case IrOpcode::kFloat32x4Add:
       return MarkAsSimd128(node), VisitFloat32x4Add(node);
     case IrOpcode::kFloat32x4Sub:
       return MarkAsSimd128(node), VisitFloat32x4Sub(node);
     case IrOpcode::kFloat32x4Equal:
       return MarkAsSimd1x4(node), VisitFloat32x4Equal(node);
     case IrOpcode::kFloat32x4NotEqual:
       return MarkAsSimd1x4(node), VisitFloat32x4NotEqual(node);
-    case IrOpcode::kCreateInt32x4:
-      return MarkAsSimd128(node), VisitCreateInt32x4(node);
+    case IrOpcode::kInt32x4Splat:
+      return MarkAsSimd128(node), VisitInt32x4Splat(node);
     case IrOpcode::kInt32x4ExtractLane:
       return MarkAsWord32(node), VisitInt32x4ExtractLane(node);
     case IrOpcode::kInt32x4ReplaceLane:
       return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node);
     case IrOpcode::kInt32x4FromFloat32x4:
       return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node);
     case IrOpcode::kUint32x4FromFloat32x4:
       return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node);
     case IrOpcode::kInt32x4Neg:
       return MarkAsSimd128(node), VisitInt32x4Neg(node);
@@ skipping 22 matching lines @@
     case IrOpcode::kUint32x4ShiftRightByScalar:
       return MarkAsSimd128(node), VisitUint32x4ShiftRightByScalar(node);
     case IrOpcode::kUint32x4Min:
       return MarkAsSimd128(node), VisitUint32x4Min(node);
     case IrOpcode::kUint32x4Max:
       return MarkAsSimd128(node), VisitUint32x4Max(node);
     case IrOpcode::kUint32x4GreaterThan:
       return MarkAsSimd1x4(node), VisitUint32x4GreaterThan(node);
     case IrOpcode::kUint32x4GreaterThanOrEqual:
       return MarkAsSimd1x4(node), VisitUint32x4GreaterThanOrEqual(node);
-    case IrOpcode::kCreateInt16x8:
-      return MarkAsSimd128(node), VisitCreateInt16x8(node);
+    case IrOpcode::kInt16x8Splat:
+      return MarkAsSimd128(node), VisitInt16x8Splat(node);
     case IrOpcode::kInt16x8ExtractLane:
       return MarkAsWord32(node), VisitInt16x8ExtractLane(node);
     case IrOpcode::kInt16x8ReplaceLane:
       return MarkAsSimd128(node), VisitInt16x8ReplaceLane(node);
     case IrOpcode::kInt16x8Neg:
       return MarkAsSimd128(node), VisitInt16x8Neg(node);
     case IrOpcode::kInt16x8ShiftLeftByScalar:
       return MarkAsSimd128(node), VisitInt16x8ShiftLeftByScalar(node);
     case IrOpcode::kInt16x8ShiftRightByScalar:
       return MarkAsSimd128(node), VisitInt16x8ShiftRightByScalar(node);
@@ skipping 26 matching lines @@
     case IrOpcode::kUint16x8SubSaturate:
       return MarkAsSimd128(node), VisitUint16x8SubSaturate(node);
     case IrOpcode::kUint16x8Min:
       return MarkAsSimd128(node), VisitUint16x8Min(node);
     case IrOpcode::kUint16x8Max:
       return MarkAsSimd128(node), VisitUint16x8Max(node);
     case IrOpcode::kUint16x8GreaterThan:
       return MarkAsSimd1x8(node), VisitUint16x8GreaterThan(node);
     case IrOpcode::kUint16x8GreaterThanOrEqual:
       return MarkAsSimd1x8(node), VisitUint16x8GreaterThanOrEqual(node);
-    case IrOpcode::kCreateInt8x16:
-      return MarkAsSimd128(node), VisitCreateInt8x16(node);
+    case IrOpcode::kInt8x16Splat:
+      return MarkAsSimd128(node), VisitInt8x16Splat(node);
     case IrOpcode::kInt8x16ExtractLane:
       return MarkAsWord32(node), VisitInt8x16ExtractLane(node);
     case IrOpcode::kInt8x16ReplaceLane:
       return MarkAsSimd128(node), VisitInt8x16ReplaceLane(node);
     case IrOpcode::kInt8x16Neg:
       return MarkAsSimd128(node), VisitInt8x16Neg(node);
     case IrOpcode::kInt8x16ShiftLeftByScalar:
       return MarkAsSimd128(node), VisitInt8x16ShiftLeftByScalar(node);
     case IrOpcode::kInt8x16ShiftRightByScalar:
       return MarkAsSimd128(node), VisitInt8x16ShiftRightByScalar(node);
@@ skipping 26 matching lines @@
     case IrOpcode::kUint8x16SubSaturate:
       return MarkAsSimd128(node), VisitUint8x16SubSaturate(node);
     case IrOpcode::kUint8x16Min:
       return MarkAsSimd128(node), VisitUint8x16Min(node);
     case IrOpcode::kUint8x16Max:
       return MarkAsSimd128(node), VisitUint8x16Max(node);
     case IrOpcode::kUint8x16GreaterThan:
       return MarkAsSimd1x16(node), VisitUint8x16GreaterThan(node);
     case IrOpcode::kUint8x16GreaterThanOrEqual:
       return MarkAsSimd1x16(node), VisitUint16x8GreaterThanOrEqual(node);
+    case IrOpcode::kSimd128Zero:
+      return MarkAsSimd128(node), VisitSimd128Zero(node);
     case IrOpcode::kSimd128And:
       return MarkAsSimd128(node), VisitSimd128And(node);
     case IrOpcode::kSimd128Or:
       return MarkAsSimd128(node), VisitSimd128Or(node);
     case IrOpcode::kSimd128Xor:
       return MarkAsSimd128(node), VisitSimd128Xor(node);
     case IrOpcode::kSimd128Not:
       return MarkAsSimd128(node), VisitSimd128Not(node);
     case IrOpcode::kSimd32x4Select:
       return MarkAsSimd128(node), VisitSimd32x4Select(node);
     case IrOpcode::kSimd16x8Select:
       return MarkAsSimd128(node), VisitSimd16x8Select(node);
     case IrOpcode::kSimd8x16Select:
       return MarkAsSimd128(node), VisitSimd8x16Select(node);
+    case IrOpcode::kSimd1x4Zero:
+      return MarkAsSimd1x4(node), VisitSimd1x4Zero(node);
+    case IrOpcode::kSimd1x8Zero:
+      return MarkAsSimd1x8(node), VisitSimd1x8Zero(node);
+    case IrOpcode::kSimd1x16Zero:
+      return MarkAsSimd1x16(node), VisitSimd1x16Zero(node);
     default:
       V8_Fatal(__FILE__, __LINE__, "Unexpected operator #%d:%s @ node #%d",
                node->opcode(), node->op()->mnemonic(), node->id());
       break;
   }
 }
 
 void InstructionSelector::VisitLoadStackPointer(Node* node) {
   OperandGenerator g(this);
   Emit(kArchStackPointer, g.DefineAsRegister(node));
@@ skipping 306 matching lines @@
 void InstructionSelector::VisitInt32PairMul(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord32PairShl(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); }
 #endif  // V8_TARGET_ARCH_64_BIT
 
 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
-void InstructionSelector::VisitCreateInt32x4(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitInt32x4Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt32x4ReplaceLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt32x4Add(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Sub(Node* node) { UNIMPLEMENTED(); }
 
+void InstructionSelector::VisitSimd128Zero(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x4Zero(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x8Zero(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x16Zero(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
 
 #if !V8_TARGET_ARCH_ARM
-void InstructionSelector::VisitCreateFloat32x4(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitFloat32x4Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitFloat32x4ExtractLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitFloat32x4ReplaceLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitFloat32x4FromInt32x4(Node* node) {
@@ skipping 69 matching lines @@
 void InstructionSelector::VisitUint32x4Min(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitUint32x4GreaterThan(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitUint32x4GreaterThanOrEqual(Node* node) {
   UNIMPLEMENTED();
 }
 
-void InstructionSelector::VisitCreateInt16x8(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitInt16x8Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt16x8ExtractLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt16x8ReplaceLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt16x8Neg(Node* node) { UNIMPLEMENTED(); }
@@ skipping 59 matching lines @@
 void InstructionSelector::VisitUint16x8Min(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitUint16x8GreaterThan(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitUint16x8GreaterThanOrEqual(Node* node) {
   UNIMPLEMENTED();
 }
 
-void InstructionSelector::VisitCreateInt8x16(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitInt8x16Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt8x16ExtractLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt8x16ReplaceLane(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitInt8x16Neg(Node* node) { UNIMPLEMENTED(); }
@@ skipping 452 matching lines @@
   return new (instruction_zone()) FrameStateDescriptor(
       instruction_zone(), state_info.type(), state_info.bailout_id(),
       state_info.state_combine(), parameters, locals, stack,
       state_info.shared_info(), outer_state);
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8