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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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194 V(ArmInt8x16NotEqual) \ | 194 V(ArmInt8x16NotEqual) \ |
195 V(ArmInt8x16GreaterThan) \ | 195 V(ArmInt8x16GreaterThan) \ |
196 V(ArmInt8x16GreaterThanOrEqual) \ | 196 V(ArmInt8x16GreaterThanOrEqual) \ |
197 V(ArmUint8x16ShiftRightByScalar) \ | 197 V(ArmUint8x16ShiftRightByScalar) \ |
198 V(ArmUint8x16AddSaturate) \ | 198 V(ArmUint8x16AddSaturate) \ |
199 V(ArmUint8x16SubSaturate) \ | 199 V(ArmUint8x16SubSaturate) \ |
200 V(ArmUint8x16Min) \ | 200 V(ArmUint8x16Min) \ |
201 V(ArmUint8x16Max) \ | 201 V(ArmUint8x16Max) \ |
202 V(ArmUint8x16GreaterThan) \ | 202 V(ArmUint8x16GreaterThan) \ |
203 V(ArmUint8x16GreaterThanOrEqual) \ | 203 V(ArmUint8x16GreaterThanOrEqual) \ |
| 204 V(ArmSimd128Zero) \ |
204 V(ArmSimd128And) \ | 205 V(ArmSimd128And) \ |
205 V(ArmSimd128Or) \ | 206 V(ArmSimd128Or) \ |
206 V(ArmSimd128Xor) \ | 207 V(ArmSimd128Xor) \ |
207 V(ArmSimd128Not) \ | 208 V(ArmSimd128Not) \ |
208 V(ArmSimd32x4Select) \ | 209 V(ArmSimd32x4Select) \ |
209 V(ArmSimd16x8Select) \ | 210 V(ArmSimd16x8Select) \ |
210 V(ArmSimd8x16Select) | 211 V(ArmSimd8x16Select) |
211 | 212 |
212 // Addressing modes represent the "shape" of inputs to an instruction. | 213 // Addressing modes represent the "shape" of inputs to an instruction. |
213 // Many instructions support multiple addressing modes. Addressing modes | 214 // Many instructions support multiple addressing modes. Addressing modes |
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225 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 226 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
226 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 227 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
227 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 228 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ |
228 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 229 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ |
229 | 230 |
230 } // namespace compiler | 231 } // namespace compiler |
231 } // namespace internal | 232 } // namespace internal |
232 } // namespace v8 | 233 } // namespace v8 |
233 | 234 |
234 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 235 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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