Index: src/compiler/mips/instruction-selector-mips.cc |
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc |
index 12f84652ade8181ce9b6170e9c8e1cd0f7730a32..d0ceac12b9e502e71b2eab546bd91a6b410bae69 100644 |
--- a/src/compiler/mips/instruction-selector-mips.cc |
+++ b/src/compiler/mips/instruction-selector-mips.cc |
@@ -405,9 +405,13 @@ void InstructionSelector::VisitWord32And(Node* node) { |
// zeros. |
if (lsb + mask_width > 32) mask_width = 32 - lsb; |
- Emit(kMipsExt, g.DefineAsRegister(node), |
- g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), |
- g.TempImmediate(mask_width)); |
+ if (lsb == 0 && mask_width == 32) { |
+ Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node())); |
+ } else { |
+ Emit(kMipsExt, g.DefineAsRegister(node), |
+ g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), |
+ g.TempImmediate(mask_width)); |
+ } |
return; |
} |
// Other cases fall through to the normal And operation. |