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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
| 6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
| 7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
| 8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
| 9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
| 10 | 10 |
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| 555 if (mleft.right().HasValue()) { | 555 if (mleft.right().HasValue()) { |
| 556 // Any shift value can match; int64 shifts use `value % 64`. | 556 // Any shift value can match; int64 shifts use `value % 64`. |
| 557 uint32_t lsb = static_cast<uint32_t>(mleft.right().Value() & 0x3f); | 557 uint32_t lsb = static_cast<uint32_t>(mleft.right().Value() & 0x3f); |
| 558 | 558 |
| 559 // Dext cannot extract bits past the register size, however since | 559 // Dext cannot extract bits past the register size, however since |
| 560 // shifting the original value would have introduced some zeros we can | 560 // shifting the original value would have introduced some zeros we can |
| 561 // still use Dext with a smaller mask and the remaining bits will be | 561 // still use Dext with a smaller mask and the remaining bits will be |
| 562 // zeros. | 562 // zeros. |
| 563 if (lsb + mask_width > 64) mask_width = 64 - lsb; | 563 if (lsb + mask_width > 64) mask_width = 64 - lsb; |
| 564 | 564 |
| 565 Emit(kMips64Dext, g.DefineAsRegister(node), | 565 if (lsb == 0 && mask_width == 64) { |
| 566 g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), | 566 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node())); |
| 567 g.TempImmediate(static_cast<int32_t>(mask_width))); | 567 } else { |
| 568 Emit(kMips64Dext, g.DefineAsRegister(node), |
| 569 g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), |
| 570 g.TempImmediate(static_cast<int32_t>(mask_width))); |
| 571 } |
| 568 return; | 572 return; |
| 569 } | 573 } |
| 570 // Other cases fall through to the normal And operation. | 574 // Other cases fall through to the normal And operation. |
| 571 } | 575 } |
| 572 } | 576 } |
| 573 if (m.right().HasValue()) { | 577 if (m.right().HasValue()) { |
| 574 uint64_t mask = m.right().Value(); | 578 uint64_t mask = m.right().Value(); |
| 575 uint32_t shift = base::bits::CountPopulation64(~mask); | 579 uint32_t shift = base::bits::CountPopulation64(~mask); |
| 576 uint32_t msb = base::bits::CountLeadingZeros64(~mask); | 580 uint32_t msb = base::bits::CountLeadingZeros64(~mask); |
| 577 if (shift != 0 && shift < 32 && msb + shift == 64) { | 581 if (shift != 0 && shift < 32 && msb + shift == 64) { |
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| 2660 } else { | 2664 } else { |
| 2661 DCHECK(kArchVariant == kMips64r2); | 2665 DCHECK(kArchVariant == kMips64r2); |
| 2662 return MachineOperatorBuilder::AlignmentRequirements:: | 2666 return MachineOperatorBuilder::AlignmentRequirements:: |
| 2663 NoUnalignedAccessSupport(); | 2667 NoUnalignedAccessSupport(); |
| 2664 } | 2668 } |
| 2665 } | 2669 } |
| 2666 | 2670 |
| 2667 } // namespace compiler | 2671 } // namespace compiler |
| 2668 } // namespace internal | 2672 } // namespace internal |
| 2669 } // namespace v8 | 2673 } // namespace v8 |
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