Revert of Add several SIMD opcodes to IA32

src/ia32/assembler-ia32.cc

Index: src/ia32/assembler-ia32.cc
diff --git a/src/ia32/assembler-ia32.cc b/src/ia32/assembler-ia32.cc
index d292a113ab9aec4def26ed2179e421fad12a1350..021177478d0237a8debf0c0d2d6bf4db36a24491 100644
--- a/src/ia32/assembler-ia32.cc
+++ b/src/ia32/assembler-ia32.cc
@@ -2864,24 +2864,6 @@
   EMIT(imm8);
 }
 
-void Assembler::sse2_instr(XMMRegister dst, const Operand& src, byte prefix,
-                           byte escape, byte opcode) {
-  EnsureSpace ensure_space(this);
-  EMIT(prefix);
-  EMIT(escape);
-  EMIT(opcode);
-  emit_sse_operand(dst, src);
-}
-
-void Assembler::vinstr(byte op, XMMRegister dst, XMMRegister src1,
-                       const Operand& src2, SIMDPrefix pp, LeadingOpcode m,
-                       VexW w) {
-  DCHECK(IsEnabled(AVX));
-  EnsureSpace ensure_space(this);
-  emit_vex_prefix(src1, kL128, pp, m, w);
-  EMIT(op);
-  emit_sse_operand(dst, src2);
-}
 
 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
   Register ireg = { reg.code() };