Revert of Add several SIMD opcodes to IA32

src/compiler/instruction-selector.cc

Index: src/compiler/instruction-selector.cc
diff --git a/src/compiler/instruction-selector.cc b/src/compiler/instruction-selector.cc
index 4856e6314ae2c56181e1664cd8a24bdbbcc64f9a..5121983e07835af2ff0a5c66a36a8d701e669796 100644
--- a/src/compiler/instruction-selector.cc
+++ b/src/compiler/instruction-selector.cc
@@ -1966,7 +1966,7 @@
 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); }
 #endif  // V8_TARGET_ARCH_64_BIT
 
-#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
+#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
 void InstructionSelector::VisitInt32x4Splat(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4ExtractLane(Node* node) {
@@ -1980,9 +1980,7 @@
 void InstructionSelector::VisitInt32x4Add(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitInt32x4Sub(Node* node) { UNIMPLEMENTED(); }
-#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_IA32
-
-#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM
+
 void InstructionSelector::VisitSimd128Zero(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd1x4Zero(Node* node) { UNIMPLEMENTED(); }