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Side by Side Diff: src/ia32/macro-assembler-ia32.cc

Issue 2717423003: Revert of Add several SIMD opcodes to IA32 (Closed)
Patch Set: Created 3 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_IA32 5 #if V8_TARGET_ARCH_IA32
6 6
7 #include "src/base/bits.h" 7 #include "src/base/bits.h"
8 #include "src/base/division-by-constant.h" 8 #include "src/base/division-by-constant.h"
9 #include "src/bootstrapper.h" 9 #include "src/bootstrapper.h"
10 #include "src/codegen.h" 10 #include "src/codegen.h"
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2263 } 2263 }
2264 } 2264 }
2265 } 2265 }
2266 2266
2267 2267
2268 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) { 2268 void MacroAssembler::Pextrd(Register dst, XMMRegister src, int8_t imm8) {
2269 if (imm8 == 0) { 2269 if (imm8 == 0) {
2270 movd(dst, src); 2270 movd(dst, src);
2271 return; 2271 return;
2272 } 2272 }
2273 DCHECK_EQ(1, imm8);
2273 if (CpuFeatures::IsSupported(SSE4_1)) { 2274 if (CpuFeatures::IsSupported(SSE4_1)) {
2274 CpuFeatureScope sse_scope(this, SSE4_1); 2275 CpuFeatureScope sse_scope(this, SSE4_1);
2275 pextrd(dst, src, imm8); 2276 pextrd(dst, src, imm8);
2276 return; 2277 return;
2277 } 2278 }
2278 DCHECK_LT(imm8, 4); 2279 pshufd(xmm0, src, 1);
2279 pshufd(xmm0, src, imm8);
2280 movd(dst, xmm0); 2280 movd(dst, xmm0);
2281 } 2281 }
2282 2282
2283 2283
2284 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) { 2284 void MacroAssembler::Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) {
2285 DCHECK(imm8 == 0 || imm8 == 1);
2285 if (CpuFeatures::IsSupported(SSE4_1)) { 2286 if (CpuFeatures::IsSupported(SSE4_1)) {
2286 CpuFeatureScope sse_scope(this, SSE4_1); 2287 CpuFeatureScope sse_scope(this, SSE4_1);
2287 pinsrd(dst, src, imm8); 2288 pinsrd(dst, src, imm8);
2288 return; 2289 return;
2289 } 2290 }
2290 movd(xmm0, src); 2291 movd(xmm0, src);
2291 if (imm8 == 1) { 2292 if (imm8 == 1) {
2292 punpckldq(dst, xmm0); 2293 punpckldq(dst, xmm0);
2293 } else { 2294 } else {
2294 DCHECK_EQ(0, imm8); 2295 DCHECK_EQ(0, imm8);
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2922 mov(eax, dividend); 2923 mov(eax, dividend);
2923 shr(eax, 31); 2924 shr(eax, 31);
2924 add(edx, eax); 2925 add(edx, eax);
2925 } 2926 }
2926 2927
2927 2928
2928 } // namespace internal 2929 } // namespace internal
2929 } // namespace v8 2930 } // namespace v8
2930 2931
2931 #endif // V8_TARGET_ARCH_IA32 2932 #endif // V8_TARGET_ARCH_IA32
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