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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> | 5 #include <assert.h> |
| 6 #include <stdarg.h> | 6 #include <stdarg.h> |
| 7 #include <stdio.h> | 7 #include <stdio.h> |
| 8 | 8 |
| 9 #if V8_TARGET_ARCH_IA32 | 9 #if V8_TARGET_ARCH_IA32 |
| 10 | 10 |
| 11 #include "src/base/compiler-specific.h" | 11 #include "src/base/compiler-specific.h" |
| 12 #include "src/disasm.h" | 12 #include "src/disasm.h" |
| 13 #include "src/ia32/sse-instr.h" | |
| 14 | 13 |
| 15 namespace disasm { | 14 namespace disasm { |
| 16 | 15 |
| 17 enum OperandOrder { | 16 enum OperandOrder { |
| 18 UNSET_OP_ORDER = 0, | 17 UNSET_OP_ORDER = 0, |
| 19 REG_OPER_OP_ORDER, | 18 REG_OPER_OP_ORDER, |
| 20 OPER_REG_OP_ORDER | 19 OPER_REG_OP_ORDER |
| 21 }; | 20 }; |
| 22 | 21 |
| 23 | 22 |
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| 996 case 0x54: | 995 case 0x54: |
| 997 AppendToBuffer("vandpd %s,%s,", NameOfXMMRegister(regop), | 996 AppendToBuffer("vandpd %s,%s,", NameOfXMMRegister(regop), |
| 998 NameOfXMMRegister(vvvv)); | 997 NameOfXMMRegister(vvvv)); |
| 999 current += PrintRightXMMOperand(current); | 998 current += PrintRightXMMOperand(current); |
| 1000 break; | 999 break; |
| 1001 case 0x57: | 1000 case 0x57: |
| 1002 AppendToBuffer("vxorpd %s,%s,", NameOfXMMRegister(regop), | 1001 AppendToBuffer("vxorpd %s,%s,", NameOfXMMRegister(regop), |
| 1003 NameOfXMMRegister(vvvv)); | 1002 NameOfXMMRegister(vvvv)); |
| 1004 current += PrintRightXMMOperand(current); | 1003 current += PrintRightXMMOperand(current); |
| 1005 break; | 1004 break; |
| 1006 #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \ | |
| 1007 case 0x##opcode: { \ | |
| 1008 AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \ | |
| 1009 NameOfXMMRegister(vvvv)); \ | |
| 1010 current += PrintRightXMMOperand(current); \ | |
| 1011 break; \ | |
| 1012 } | |
| 1013 | |
| 1014 SSE2_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) | |
| 1015 #undef DECLARE_SSE_AVX_DIS_CASE | |
| 1016 default: | 1005 default: |
| 1017 UnimplementedInstruction(); | 1006 UnimplementedInstruction(); |
| 1018 } | 1007 } |
| 1019 } else { | 1008 } else { |
| 1020 UnimplementedInstruction(); | 1009 UnimplementedInstruction(); |
| 1021 } | 1010 } |
| 1022 | 1011 |
| 1023 return static_cast<int>(current - data); | 1012 return static_cast<int>(current - data); |
| 1024 } | 1013 } |
| 1025 | 1014 |
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| 1933 NameOfXMMRegister(rm)); | 1922 NameOfXMMRegister(rm)); |
| 1934 data++; | 1923 data++; |
| 1935 } else if (*data == 0xEB) { | 1924 } else if (*data == 0xEB) { |
| 1936 data++; | 1925 data++; |
| 1937 int mod, regop, rm; | 1926 int mod, regop, rm; |
| 1938 get_modrm(*data, &mod, ®op, &rm); | 1927 get_modrm(*data, &mod, ®op, &rm); |
| 1939 AppendToBuffer("por %s,%s", | 1928 AppendToBuffer("por %s,%s", |
| 1940 NameOfXMMRegister(regop), | 1929 NameOfXMMRegister(regop), |
| 1941 NameOfXMMRegister(rm)); | 1930 NameOfXMMRegister(rm)); |
| 1942 data++; | 1931 data++; |
| 1943 } else if (*data == 0xFA) { | |
| 1944 data++; | |
| 1945 int mod, regop, rm; | |
| 1946 get_modrm(*data, &mod, ®op, &rm); | |
| 1947 AppendToBuffer("psubd %s,", NameOfXMMRegister(regop)); | |
| 1948 data += PrintRightXMMOperand(data); | |
| 1949 } else if (*data == 0xFE) { | |
| 1950 data++; | |
| 1951 int mod, regop, rm; | |
| 1952 get_modrm(*data, &mod, ®op, &rm); | |
| 1953 AppendToBuffer("paddd %s,", NameOfXMMRegister(regop)); | |
| 1954 data += PrintRightXMMOperand(data); | |
| 1955 } else if (*data == 0xB1) { | 1932 } else if (*data == 0xB1) { |
| 1956 data++; | 1933 data++; |
| 1957 data += PrintOperands("cmpxchg_w", OPER_REG_OP_ORDER, data); | 1934 data += PrintOperands("cmpxchg_w", OPER_REG_OP_ORDER, data); |
| 1958 } else { | 1935 } else { |
| 1959 UnimplementedInstruction(); | 1936 UnimplementedInstruction(); |
| 1960 } | 1937 } |
| 1961 } else { | 1938 } else { |
| 1962 UnimplementedInstruction(); | 1939 UnimplementedInstruction(); |
| 1963 } | 1940 } |
| 1964 break; | 1941 break; |
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| 2358 fprintf(f, " "); | 2335 fprintf(f, " "); |
| 2359 } | 2336 } |
| 2360 fprintf(f, " %s\n", buffer.start()); | 2337 fprintf(f, " %s\n", buffer.start()); |
| 2361 } | 2338 } |
| 2362 } | 2339 } |
| 2363 | 2340 |
| 2364 | 2341 |
| 2365 } // namespace disasm | 2342 } // namespace disasm |
| 2366 | 2343 |
| 2367 #endif // V8_TARGET_ARCH_IA32 | 2344 #endif // V8_TARGET_ARCH_IA32 |
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