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Side by Side Diff: src/ia32/assembler-ia32.h

Issue 2717423003: Revert of Add several SIMD opcodes to IA32 (Closed)
Patch Set: Created 3 years, 9 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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33 // Copyright 2011 the V8 project authors. All rights reserved. 33 // Copyright 2011 the V8 project authors. All rights reserved.
34 34
35 // A light-weight IA32 Assembler. 35 // A light-weight IA32 Assembler.
36 36
37 #ifndef V8_IA32_ASSEMBLER_IA32_H_ 37 #ifndef V8_IA32_ASSEMBLER_IA32_H_
38 #define V8_IA32_ASSEMBLER_IA32_H_ 38 #define V8_IA32_ASSEMBLER_IA32_H_
39 39
40 #include <deque> 40 #include <deque>
41 41
42 #include "src/assembler.h" 42 #include "src/assembler.h"
43 #include "src/ia32/sse-instr.h"
44 #include "src/isolate.h" 43 #include "src/isolate.h"
45 #include "src/utils.h" 44 #include "src/utils.h"
46 45
47 namespace v8 { 46 namespace v8 {
48 namespace internal { 47 namespace internal {
49 48
50 #define GENERAL_REGISTERS(V) \ 49 #define GENERAL_REGISTERS(V) \
51 V(eax) \ 50 V(eax) \
52 V(ecx) \ 51 V(ecx) \
53 V(edx) \ 52 V(edx) \
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1412 void v##name##pd(XMMRegister dst, XMMRegister src1, const Operand& src2) { \ 1411 void v##name##pd(XMMRegister dst, XMMRegister src1, const Operand& src2) { \
1413 vpd(opcode, dst, src1, src2); \ 1412 vpd(opcode, dst, src1, src2); \
1414 } 1413 }
1415 1414
1416 PACKED_OP_LIST(AVX_PACKED_OP_DECLARE); 1415 PACKED_OP_LIST(AVX_PACKED_OP_DECLARE);
1417 void vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2); 1416 void vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1418 void vps(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2); 1417 void vps(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1419 void vpd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2); 1418 void vpd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
1420 void vpd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2); 1419 void vpd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1421 1420
1422 // Other SSE and AVX instructions
1423 #define DECLARE_SSE2_INSTRUCTION(instruction, prefix, escape, opcode) \
1424 void instruction(XMMRegister dst, XMMRegister src) { \
1425 instruction(dst, Operand(src)); \
1426 } \
1427 void instruction(XMMRegister dst, const Operand& src) { \
1428 sse2_instr(dst, src, 0x##prefix, 0x##escape, 0x##opcode); \
1429 }
1430
1431 SSE2_INSTRUCTION_LIST(DECLARE_SSE2_INSTRUCTION)
1432 #undef DECLARE_SSE2_INSTRUCTION
1433
1434 #define DECLARE_SSE2_AVX_INSTRUCTION(instruction, prefix, escape, opcode) \
1435 void v##instruction(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
1436 v##instruction(dst, src1, Operand(src2)); \
1437 } \
1438 void v##instruction(XMMRegister dst, XMMRegister src1, \
1439 const Operand& src2) { \
1440 vinstr(0x##opcode, dst, src1, src2, k##prefix, k##escape, kW0); \
1441 }
1442
1443 SSE2_INSTRUCTION_LIST(DECLARE_SSE2_AVX_INSTRUCTION)
1444 #undef DECLARE_SSE2_AVX_INSTRUCTION
1445
1446 // Prefetch src position into cache level. 1421 // Prefetch src position into cache level.
1447 // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a 1422 // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a
1448 // non-temporal 1423 // non-temporal
1449 void prefetch(const Operand& src, int level); 1424 void prefetch(const Operand& src, int level);
1450 // TODO(lrn): Need SFENCE for movnt? 1425 // TODO(lrn): Need SFENCE for movnt?
1451 1426
1452 // Check the code size generated from label to here. 1427 // Check the code size generated from label to here.
1453 int SizeOfCodeGeneratedSince(Label* label) { 1428 int SizeOfCodeGeneratedSince(Label* label) {
1454 return pc_offset() - label->pos(); 1429 return pc_offset() - label->pos();
1455 } 1430 }
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1566 // labels 1541 // labels
1567 void print(Label* L); 1542 void print(Label* L);
1568 void bind_to(Label* L, int pos); 1543 void bind_to(Label* L, int pos);
1569 1544
1570 // displacements 1545 // displacements
1571 inline Displacement disp_at(Label* L); 1546 inline Displacement disp_at(Label* L);
1572 inline void disp_at_put(Label* L, Displacement disp); 1547 inline void disp_at_put(Label* L, Displacement disp);
1573 inline void emit_disp(Label* L, Displacement::Type type); 1548 inline void emit_disp(Label* L, Displacement::Type type);
1574 inline void emit_near_disp(Label* L); 1549 inline void emit_near_disp(Label* L);
1575 1550
1576 void sse2_instr(XMMRegister dst, const Operand& src, byte prefix, byte escape,
1577 byte opcode);
1578 void vinstr(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2,
1579 SIMDPrefix pp, LeadingOpcode m, VexW w);
1580 // Most BMI instructions are similiar. 1551 // Most BMI instructions are similiar.
1581 void bmi1(byte op, Register reg, Register vreg, const Operand& rm); 1552 void bmi1(byte op, Register reg, Register vreg, const Operand& rm);
1582 void bmi2(SIMDPrefix pp, byte op, Register reg, Register vreg, 1553 void bmi2(SIMDPrefix pp, byte op, Register reg, Register vreg,
1583 const Operand& rm); 1554 const Operand& rm);
1584 1555
1585 // record reloc info for current pc_ 1556 // record reloc info for current pc_
1586 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); 1557 void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0);
1587 1558
1588 friend class CodePatcher; 1559 friend class CodePatcher;
1589 friend class EnsureSpace; 1560 friend class EnsureSpace;
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1622 Assembler* assembler_; 1593 Assembler* assembler_;
1623 #ifdef DEBUG 1594 #ifdef DEBUG
1624 int space_before_; 1595 int space_before_;
1625 #endif 1596 #endif
1626 }; 1597 };
1627 1598
1628 } // namespace internal 1599 } // namespace internal
1629 } // namespace v8 1600 } // namespace v8
1630 1601
1631 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1602 #endif // V8_IA32_ASSEMBLER_IA32_H_
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