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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // CPU specific code for arm independent of OS goes here. | 5 // CPU specific code for arm independent of OS goes here. |
6 | 6 |
7 #include "v8.h" | 7 #include "v8.h" |
8 | 8 |
9 #if V8_TARGET_ARCH_ARM64 | 9 #if V8_TARGET_ARCH_ARM64 |
10 | 10 |
11 #include "arm64/cpu-arm64.h" | 11 #include "arm64/cpu-arm64.h" |
12 #include "arm64/utils-arm64.h" | 12 #include "arm64/utils-arm64.h" |
13 | 13 |
14 namespace v8 { | 14 namespace v8 { |
15 namespace internal { | 15 namespace internal { |
16 | 16 |
17 #ifdef DEBUG | 17 #ifdef DEBUG |
18 bool CpuFeatures::initialized_ = false; | 18 bool CpuFeatures::initialized_ = false; |
19 #endif | 19 #endif |
20 unsigned CpuFeatures::supported_ = 0; | 20 unsigned CpuFeatures::supported_ = 0; |
21 unsigned CpuFeatures::found_by_runtime_probing_only_ = 0; | |
22 unsigned CpuFeatures::cross_compile_ = 0; | 21 unsigned CpuFeatures::cross_compile_ = 0; |
23 | 22 |
24 | 23 |
25 class CacheLineSizes { | 24 class CacheLineSizes { |
26 public: | 25 public: |
27 CacheLineSizes() { | 26 CacheLineSizes() { |
28 #ifdef USE_SIMULATOR | 27 #ifdef USE_SIMULATOR |
29 cache_type_register_ = 0; | 28 cache_type_register_ = 0; |
30 #else | 29 #else |
31 // Copy the content of the cache type register to a core register. | 30 // Copy the content of the cache type register to a core register. |
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120 [end] "r" (end) | 119 [end] "r" (end) |
121 // This code does not write to memory but without the dependency gcc might | 120 // This code does not write to memory but without the dependency gcc might |
122 // move this code before the code is generated. | 121 // move this code before the code is generated. |
123 : "cc", "memory" | 122 : "cc", "memory" |
124 ); // NOLINT | 123 ); // NOLINT |
125 #endif | 124 #endif |
126 } | 125 } |
127 | 126 |
128 | 127 |
129 void CpuFeatures::Probe(bool serializer_enabled) { | 128 void CpuFeatures::Probe(bool serializer_enabled) { |
130 ASSERT(supported_ == 0); | 129 // AArch64 has no configuration options, no further probing is required. |
131 | 130 supported_ = 0; |
132 if (serializer_enabled && FLAG_enable_always_align_csp) { | |
133 // Always align csp in snapshot code - this is safe and ensures that csp | |
134 // will always be aligned if it is enabled by probing at runtime. | |
135 supported_ |= static_cast<uint64_t>(1) << ALWAYS_ALIGN_CSP; | |
136 } | |
137 | |
138 if (!serializer_enabled) { | |
139 CPU cpu; | |
140 // Always align csp on Nvidia cores. | |
141 if (cpu.implementer() == CPU::NVIDIA && FLAG_enable_always_align_csp) { | |
142 found_by_runtime_probing_only_ |= | |
143 static_cast<uint64_t>(1) << ALWAYS_ALIGN_CSP; | |
144 } | |
145 | |
146 supported_ |= found_by_runtime_probing_only_; | |
147 } | |
148 | 131 |
149 #ifdef DEBUG | 132 #ifdef DEBUG |
150 initialized_ = true; | 133 initialized_ = true; |
151 #endif | 134 #endif |
152 } | 135 } |
153 | 136 |
154 | 137 |
155 } } // namespace v8::internal | 138 } } // namespace v8::internal |
156 | 139 |
157 #endif // V8_TARGET_ARCH_ARM64 | 140 #endif // V8_TARGET_ARCH_ARM64 |
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