[wasm]implement simd lowering for F32x4 and I32x4 binops

src/compiler/simd-scalar-lowering.cc

Index: src/compiler/simd-scalar-lowering.cc
diff --git a/src/compiler/simd-scalar-lowering.cc b/src/compiler/simd-scalar-lowering.cc
index 19ffe9377582a9264d8b870c58705ace846a0d86..bca5008d9009d175c0d0d7feec7313299fc48939 100644
--- a/src/compiler/simd-scalar-lowering.cc
+++ b/src/compiler/simd-scalar-lowering.cc
@@ -73,12 +73,22 @@ void SimdScalarLowering::LowerGraph() {
 
 #define FOREACH_INT32X4_OPCODE(V) \
   V(Int32x4Add)                   \
+  V(Int32x4Sub)                   \
+  V(Int32x4Mul)                   \
+  V(Simd128And)                   \
+  V(Simd128Or)                    \
+  V(Simd128Xor)                   \
   V(Int32x4ExtractLane)           \
   V(CreateInt32x4)                \
   V(Int32x4ReplaceLane)

[bbudge, 2017/02/24 20:53:35]

nit: Since we have many ops, I've been trying to order them, roughly:
Create
Extract/Replace lane
Unary ops
Binary ops
Relational ops
etc.

And types ordered:
Float32x4
Int32x4
Int16x8
Int8x16
Simd128
Simd32x4
Simd1x4 etc.

[aseemgarg, 2017/02/25 03:25:16]

Done.

 
 #define FOREACH_FLOAT32X4_OPCODE(V) \
   V(Float32x4Add)                   \
+  V(Float32x4Sub)                   \
+  V(Float32x4Mul)                   \
+  V(Float32x4Div)                   \
+  V(Float32x4Min)                   \
+  V(Float32x4Max)                   \
   V(Float32x4ExtractLane)           \
   V(CreateFloat32x4)                \
   V(Float32x4ReplaceLane)
@@ -377,14 +387,30 @@ void SimdScalarLowering::LowerNode(Node* node) {
       }
       break;
     }
-    case IrOpcode::kInt32x4Add: {
-      LowerBinaryOp(node, rep_type, machine()->Int32Add());
-      break;
-    }
-    case IrOpcode::kFloat32x4Add: {
-      LowerBinaryOp(node, rep_type, machine()->Float32Add());
-      break;
-    }
+#define I32X4_BINOP_CASE(s_op, m_op)                  \

[bbudge, 2017/02/24 20:53:36]

Macro param names: Name, instruction or op.

[aseemgarg, 2017/02/25 03:25:16]

changed to opcode, instruction

+  case IrOpcode::s_op: {                              \
+    LowerBinaryOp(node, rep_type, machine()->m_op()); \
+    break;                                            \
+  }
+      I32X4_BINOP_CASE(kInt32x4Add, Int32Add)
+      I32X4_BINOP_CASE(kInt32x4Sub, Int32Sub)
+      I32X4_BINOP_CASE(kInt32x4Mul, Int32Mul)
+      I32X4_BINOP_CASE(kSimd128And, Word32And)
+      I32X4_BINOP_CASE(kSimd128Or, Word32Or)
+      I32X4_BINOP_CASE(kSimd128Xor, Word32Xor)
+#undef I32X4_BINOP_CASE
+#define F32X4_BINOP_CASE(name)                                 \
+  case IrOpcode::kFloat32x4##name: {                           \
+    LowerBinaryOp(node, rep_type, machine()->Float32##name()); \
+    break;                                                     \
+  }
+      F32X4_BINOP_CASE(Add)
+      F32X4_BINOP_CASE(Sub)
+      F32X4_BINOP_CASE(Mul)
+      F32X4_BINOP_CASE(Div)
+      F32X4_BINOP_CASE(Min)
+      F32X4_BINOP_CASE(Max)
+#undef F32X4_BINOP_CASE
     case IrOpcode::kCreateInt32x4:
     case IrOpcode::kCreateFloat32x4: {
       Node* rep_node[kMaxLanes];