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Side by Side Diff: src/ppc/assembler-ppc.h

Issue 2712193002: PPC: Declare XX3 format assembler function with opcode list macro (Closed)
Patch Set: Created 3 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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546 // FIXED_SEQUENCE 546 // FIXED_SEQUENCE
547 static const int kDebugBreakSlotInstructions = 547 static const int kDebugBreakSlotInstructions =
548 kMovInstructionsNoConstantPool + 2; 548 kMovInstructionsNoConstantPool + 2;
549 static const int kDebugBreakSlotLength = 549 static const int kDebugBreakSlotLength =
550 kDebugBreakSlotInstructions * kInstrSize; 550 kDebugBreakSlotInstructions * kInstrSize;
551 551
552 static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) { 552 static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) {
553 return ((cr.code() * CRWIDTH) + crbit); 553 return ((cr.code() * CRWIDTH) + crbit);
554 } 554 }
555 555
556 #define DECLARE_PPC_XX3_INSTRUCTIONS(name, instr_name, instr_value) \
557 inline void name(const DoubleRegister rt, const DoubleRegister ra, \
558 const DoubleRegister rb) { \
559 xx3_form(instr_name, rt, ra, rb); \
560 }
561
562 inline void xx3_form(Instr instr, DoubleRegister t, DoubleRegister a,
563 DoubleRegister b) {
564 int AX = ((a.code() & 0x20) >> 5) & 0x1;
565 int BX = ((b.code() & 0x20) >> 5) & 0x1;
566 int TX = ((t.code() & 0x20) >> 5) & 0x1;
567
568 emit(instr | (t.code() & 0x1F) * B21 | (a.code() & 0x1F) * B16 |
569 (b.code() & 0x1F) * B11 | AX * B2 | BX * B1 | TX);
570 }
571
572 PPC_XX3_OPCODE_LIST(DECLARE_PPC_XX3_INSTRUCTIONS)
573 #undef DECLARE_PPC_XX3_INSTRUCTIONS
574
556 // --------------------------------------------------------------------------- 575 // ---------------------------------------------------------------------------
557 // Code generation 576 // Code generation
558 577
559 // Insert the smallest number of nop instructions 578 // Insert the smallest number of nop instructions
560 // possible to align the pc offset to a multiple 579 // possible to align the pc offset to a multiple
561 // of m. m must be a power of 2 (>= 4). 580 // of m. m must be a power of 2 (>= 4).
562 void Align(int m); 581 void Align(int m);
563 // Insert the smallest number of zero bytes possible to align the pc offset 582 // Insert the smallest number of zero bytes possible to align the pc offset
564 // to a mulitple of m. m must be a power of 2 (>= 2). 583 // to a mulitple of m. m must be a power of 2 (>= 2).
565 void DataAlign(int m); 584 void DataAlign(int m);
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1095 RCBit rc = LeaveRC); 1114 RCBit rc = LeaveRC);
1096 void fabs(const DoubleRegister frt, const DoubleRegister frb, 1115 void fabs(const DoubleRegister frt, const DoubleRegister frb,
1097 RCBit rc = LeaveRC); 1116 RCBit rc = LeaveRC);
1098 void fmadd(const DoubleRegister frt, const DoubleRegister fra, 1117 void fmadd(const DoubleRegister frt, const DoubleRegister fra,
1099 const DoubleRegister frc, const DoubleRegister frb, 1118 const DoubleRegister frc, const DoubleRegister frb,
1100 RCBit rc = LeaveRC); 1119 RCBit rc = LeaveRC);
1101 void fmsub(const DoubleRegister frt, const DoubleRegister fra, 1120 void fmsub(const DoubleRegister frt, const DoubleRegister fra,
1102 const DoubleRegister frc, const DoubleRegister frb, 1121 const DoubleRegister frc, const DoubleRegister frb,
1103 RCBit rc = LeaveRC); 1122 RCBit rc = LeaveRC);
1104 1123
1105 // Support for VSX instructions
1106
1107 void xsadddp(const DoubleRegister frt, const DoubleRegister fra,
1108 const DoubleRegister frb);
1109 void xssubdp(const DoubleRegister frt, const DoubleRegister fra,
1110 const DoubleRegister frb);
1111 void xsdivdp(const DoubleRegister frt, const DoubleRegister fra,
1112 const DoubleRegister frb);
1113 void xsmuldp(const DoubleRegister frt, const DoubleRegister fra,
1114 const DoubleRegister frc);
1115
1116 // Pseudo instructions 1124 // Pseudo instructions
1117 1125
1118 // Different nop operations are used by the code generator to detect certain 1126 // Different nop operations are used by the code generator to detect certain
1119 // states of the generated code. 1127 // states of the generated code.
1120 enum NopMarkerTypes { 1128 enum NopMarkerTypes {
1121 NON_MARKING_NOP = 0, 1129 NON_MARKING_NOP = 0,
1122 GROUP_ENDING_NOP, 1130 GROUP_ENDING_NOP,
1123 DEBUG_BREAK_NOP, 1131 DEBUG_BREAK_NOP,
1124 // IC markers. 1132 // IC markers.
1125 PROPERTY_ACCESS_INLINED, 1133 PROPERTY_ACCESS_INLINED,
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1408 inline void CheckTrampolinePoolQuick(); 1416 inline void CheckTrampolinePoolQuick();
1409 1417
1410 // Instruction generation 1418 // Instruction generation
1411 void a_form(Instr instr, DoubleRegister frt, DoubleRegister fra, 1419 void a_form(Instr instr, DoubleRegister frt, DoubleRegister fra,
1412 DoubleRegister frb, RCBit r); 1420 DoubleRegister frb, RCBit r);
1413 void d_form(Instr instr, Register rt, Register ra, const intptr_t val, 1421 void d_form(Instr instr, Register rt, Register ra, const intptr_t val,
1414 bool signed_disp); 1422 bool signed_disp);
1415 void x_form(Instr instr, Register ra, Register rs, Register rb, RCBit r); 1423 void x_form(Instr instr, Register ra, Register rs, Register rb, RCBit r);
1416 void xo_form(Instr instr, Register rt, Register ra, Register rb, OEBit o, 1424 void xo_form(Instr instr, Register rt, Register ra, Register rb, OEBit o,
1417 RCBit r); 1425 RCBit r);
1418 void xx3_form(Instr instr, DoubleRegister t, DoubleRegister a,
1419 DoubleRegister b);
1420 void md_form(Instr instr, Register ra, Register rs, int shift, int maskbit, 1426 void md_form(Instr instr, Register ra, Register rs, int shift, int maskbit,
1421 RCBit r); 1427 RCBit r);
1422 void mds_form(Instr instr, Register ra, Register rs, Register rb, int maskbit, 1428 void mds_form(Instr instr, Register ra, Register rs, Register rb, int maskbit,
1423 RCBit r); 1429 RCBit r);
1424 1430
1425 // Labels 1431 // Labels
1426 void print(Label* L); 1432 void print(Label* L);
1427 int max_reach_from(int pos); 1433 int max_reach_from(int pos);
1428 void bind_to(Label* L, int pos); 1434 void bind_to(Label* L, int pos);
1429 void next(Label* L); 1435 void next(Label* L);
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1484 1490
1485 1491
1486 class EnsureSpace BASE_EMBEDDED { 1492 class EnsureSpace BASE_EMBEDDED {
1487 public: 1493 public:
1488 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } 1494 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); }
1489 }; 1495 };
1490 } // namespace internal 1496 } // namespace internal
1491 } // namespace v8 1497 } // namespace v8
1492 1498
1493 #endif // V8_PPC_ASSEMBLER_PPC_H_ 1499 #endif // V8_PPC_ASSEMBLER_PPC_H_
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