Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(54)

Unified Diff: src/compiler/opcodes.h

Issue 2711863002: Implement remaining Boolean SIMD operations on ARM. (Closed)
Patch Set: Fix macro assembler test. Created 3 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « src/compiler/machine-operator.cc ('k') | src/compiler/wasm-compiler.cc » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/compiler/opcodes.h
diff --git a/src/compiler/opcodes.h b/src/compiler/opcodes.h
index 7dab45e0171e22783c0a6e98957b2d79c9af2120..16855d1627c220d1853f99811271640c9726c5bd 100644
--- a/src/compiler/opcodes.h
+++ b/src/compiler/opcodes.h
@@ -552,171 +552,159 @@
V(AtomicStore) \
V(UnsafePointerAdd)
-#define MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \
- V(Float32x4Splat) \
- V(Float32x4ReplaceLane) \
- V(Float32x4Abs) \
- V(Float32x4Neg) \
- V(Float32x4Sqrt) \
- V(Float32x4RecipApprox) \
- V(Float32x4RecipSqrtApprox) \
- V(Float32x4Add) \
- V(Float32x4Sub) \
- V(Float32x4Mul) \
- V(Float32x4Div) \
- V(Float32x4Min) \
- V(Float32x4Max) \
- V(Float32x4MinNum) \
- V(Float32x4MaxNum) \
- V(Float32x4Equal) \
- V(Float32x4NotEqual) \
- V(Float32x4LessThan) \
- V(Float32x4LessThanOrEqual) \
- V(Float32x4GreaterThan) \
- V(Float32x4GreaterThanOrEqual) \
- V(Float32x4FromInt32x4) \
- V(Float32x4FromUint32x4) \
- V(Int32x4Splat) \
- V(Int32x4ReplaceLane) \
- V(Int32x4Neg) \
- V(Int32x4Add) \
- V(Int32x4Sub) \
- V(Int32x4Mul) \
- V(Int32x4Min) \
- V(Int32x4Max) \
- V(Int32x4ShiftLeftByScalar) \
- V(Int32x4ShiftRightByScalar) \
- V(Int32x4Equal) \
- V(Int32x4NotEqual) \
- V(Int32x4LessThan) \
- V(Int32x4LessThanOrEqual) \
- V(Int32x4GreaterThan) \
- V(Int32x4GreaterThanOrEqual) \
- V(Int32x4FromFloat32x4) \
- V(Uint32x4Min) \
- V(Uint32x4Max) \
- V(Uint32x4ShiftLeftByScalar) \
- V(Uint32x4ShiftRightByScalar) \
- V(Uint32x4LessThan) \
- V(Uint32x4LessThanOrEqual) \
- V(Uint32x4GreaterThan) \
- V(Uint32x4GreaterThanOrEqual) \
- V(Uint32x4FromFloat32x4) \
- V(Bool32x4And) \
- V(Bool32x4Or) \
- V(Bool32x4Xor) \
- V(Bool32x4Not) \
- V(Int16x8Splat) \
- V(Int16x8ReplaceLane) \
- V(Int16x8Neg) \
- V(Int16x8Add) \
- V(Int16x8AddSaturate) \
- V(Int16x8Sub) \
- V(Int16x8SubSaturate) \
- V(Int16x8Mul) \
- V(Int16x8Min) \
- V(Int16x8Max) \
- V(Int16x8ShiftLeftByScalar) \
- V(Int16x8ShiftRightByScalar) \
- V(Int16x8Equal) \
- V(Int16x8NotEqual) \
- V(Int16x8LessThan) \
- V(Int16x8LessThanOrEqual) \
- V(Int16x8GreaterThan) \
- V(Int16x8GreaterThanOrEqual) \
- V(Uint16x8AddSaturate) \
- V(Uint16x8SubSaturate) \
- V(Uint16x8Min) \
- V(Uint16x8Max) \
- V(Uint16x8ShiftLeftByScalar) \
- V(Uint16x8ShiftRightByScalar) \
- V(Uint16x8LessThan) \
- V(Uint16x8LessThanOrEqual) \
- V(Uint16x8GreaterThan) \
- V(Uint16x8GreaterThanOrEqual) \
- V(Bool16x8And) \
- V(Bool16x8Or) \
- V(Bool16x8Xor) \
- V(Bool16x8Not) \
- V(Int8x16Splat) \
- V(Int8x16ReplaceLane) \
- V(Int8x16Neg) \
- V(Int8x16Add) \
- V(Int8x16AddSaturate) \
- V(Int8x16Sub) \
- V(Int8x16SubSaturate) \
- V(Int8x16Mul) \
- V(Int8x16Min) \
- V(Int8x16Max) \
- V(Int8x16ShiftLeftByScalar) \
- V(Int8x16ShiftRightByScalar) \
- V(Int8x16Equal) \
- V(Int8x16NotEqual) \
- V(Int8x16LessThan) \
- V(Int8x16LessThanOrEqual) \
- V(Int8x16GreaterThan) \
- V(Int8x16GreaterThanOrEqual) \
- V(Uint8x16AddSaturate) \
- V(Uint8x16SubSaturate) \
- V(Uint8x16Min) \
- V(Uint8x16Max) \
- V(Uint8x16ShiftLeftByScalar) \
- V(Uint8x16ShiftRightByScalar) \
- V(Uint8x16LessThan) \
- V(Uint8x16LessThanOrEqual) \
- V(Uint8x16GreaterThan) \
- V(Uint8x16GreaterThanOrEqual) \
- V(Bool8x16And) \
- V(Bool8x16Or) \
- V(Bool8x16Xor) \
- V(Bool8x16Not) \
- V(Simd128Zero) \
- V(Simd128And) \
- V(Simd128Or) \
- V(Simd128Xor) \
- V(Simd128Not) \
- V(Simd32x4Select) \
- V(Simd32x4Swizzle) \
- V(Simd32x4Shuffle) \
- V(Simd16x8Select) \
- V(Simd16x8Swizzle) \
- V(Simd16x8Shuffle) \
- V(Simd8x16Select) \
- V(Simd8x16Swizzle) \
- V(Simd8x16Shuffle) \
- V(Simd1x4Zero) \
- V(Simd1x8Zero) \
- V(Simd1x16Zero)
-
-#define MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
- V(Float32x4ExtractLane) \
- V(Int32x4ExtractLane) \
- V(Int16x8ExtractLane) \
- V(Int8x16ExtractLane)
-
-#define MACHINE_SIMD_RETURN_BOOL_OP_LIST(V) \
- V(Bool32x4AnyTrue) \
- V(Bool32x4AllTrue) \
- V(Bool16x8AnyTrue) \
- V(Bool16x8AllTrue) \
- V(Bool8x16AnyTrue) \
- V(Bool8x16AllTrue)
-
-#define MACHINE_SIMD_GENERIC_OP_LIST(V) \
- V(Simd128Load) \
- V(Simd128Load1) \
- V(Simd128Load2) \
- V(Simd128Load3) \
- V(Simd128Store) \
- V(Simd128Store1) \
- V(Simd128Store2) \
- V(Simd128Store3)
-
-#define MACHINE_SIMD_OP_LIST(V) \
- MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \
- MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
- MACHINE_SIMD_RETURN_BOOL_OP_LIST(V) \
- MACHINE_SIMD_GENERIC_OP_LIST(V)
+#define MACHINE_SIMD_OP_LIST(V) \
+ V(Float32x4Splat) \
+ V(Float32x4ExtractLane) \
+ V(Float32x4ReplaceLane) \
+ V(Float32x4Abs) \
+ V(Float32x4Neg) \
+ V(Float32x4Sqrt) \
+ V(Float32x4RecipApprox) \
+ V(Float32x4RecipSqrtApprox) \
+ V(Float32x4Add) \
+ V(Float32x4Sub) \
+ V(Float32x4Mul) \
+ V(Float32x4Div) \
+ V(Float32x4Min) \
+ V(Float32x4Max) \
+ V(Float32x4MinNum) \
+ V(Float32x4MaxNum) \
+ V(Float32x4Equal) \
+ V(Float32x4NotEqual) \
+ V(Float32x4LessThan) \
+ V(Float32x4LessThanOrEqual) \
+ V(Float32x4GreaterThan) \
+ V(Float32x4GreaterThanOrEqual) \
+ V(Float32x4FromInt32x4) \
+ V(Float32x4FromUint32x4) \
+ V(Int32x4Splat) \
+ V(Int32x4ExtractLane) \
+ V(Int32x4ReplaceLane) \
+ V(Int32x4Neg) \
+ V(Int32x4Add) \
+ V(Int32x4Sub) \
+ V(Int32x4Mul) \
+ V(Int32x4Min) \
+ V(Int32x4Max) \
+ V(Int32x4ShiftLeftByScalar) \
+ V(Int32x4ShiftRightByScalar) \
+ V(Int32x4Equal) \
+ V(Int32x4NotEqual) \
+ V(Int32x4LessThan) \
+ V(Int32x4LessThanOrEqual) \
+ V(Int32x4GreaterThan) \
+ V(Int32x4GreaterThanOrEqual) \
+ V(Int32x4FromFloat32x4) \
+ V(Uint32x4Min) \
+ V(Uint32x4Max) \
+ V(Uint32x4ShiftLeftByScalar) \
+ V(Uint32x4ShiftRightByScalar) \
+ V(Uint32x4LessThan) \
+ V(Uint32x4LessThanOrEqual) \
+ V(Uint32x4GreaterThan) \
+ V(Uint32x4GreaterThanOrEqual) \
+ V(Uint32x4FromFloat32x4) \
+ V(Int16x8Splat) \
+ V(Int16x8ExtractLane) \
+ V(Int16x8ReplaceLane) \
+ V(Int16x8Neg) \
+ V(Int16x8Add) \
+ V(Int16x8AddSaturate) \
+ V(Int16x8Sub) \
+ V(Int16x8SubSaturate) \
+ V(Int16x8Mul) \
+ V(Int16x8Min) \
+ V(Int16x8Max) \
+ V(Int16x8ShiftLeftByScalar) \
+ V(Int16x8ShiftRightByScalar) \
+ V(Int16x8Equal) \
+ V(Int16x8NotEqual) \
+ V(Int16x8LessThan) \
+ V(Int16x8LessThanOrEqual) \
+ V(Int16x8GreaterThan) \
+ V(Int16x8GreaterThanOrEqual) \
+ V(Uint16x8AddSaturate) \
+ V(Uint16x8SubSaturate) \
+ V(Uint16x8Min) \
+ V(Uint16x8Max) \
+ V(Uint16x8ShiftLeftByScalar) \
+ V(Uint16x8ShiftRightByScalar) \
+ V(Uint16x8LessThan) \
+ V(Uint16x8LessThanOrEqual) \
+ V(Uint16x8GreaterThan) \
+ V(Uint16x8GreaterThanOrEqual) \
+ V(Int8x16Splat) \
+ V(Int8x16ExtractLane) \
+ V(Int8x16ReplaceLane) \
+ V(Int8x16Neg) \
+ V(Int8x16Add) \
+ V(Int8x16AddSaturate) \
+ V(Int8x16Sub) \
+ V(Int8x16SubSaturate) \
+ V(Int8x16Mul) \
+ V(Int8x16Min) \
+ V(Int8x16Max) \
+ V(Int8x16ShiftLeftByScalar) \
+ V(Int8x16ShiftRightByScalar) \
+ V(Int8x16Equal) \
+ V(Int8x16NotEqual) \
+ V(Int8x16LessThan) \
+ V(Int8x16LessThanOrEqual) \
+ V(Int8x16GreaterThan) \
+ V(Int8x16GreaterThanOrEqual) \
+ V(Uint8x16AddSaturate) \
+ V(Uint8x16SubSaturate) \
+ V(Uint8x16Min) \
+ V(Uint8x16Max) \
+ V(Uint8x16ShiftLeftByScalar) \
+ V(Uint8x16ShiftRightByScalar) \
+ V(Uint8x16LessThan) \
+ V(Uint8x16LessThanOrEqual) \
+ V(Uint8x16GreaterThan) \
+ V(Uint8x16GreaterThanOrEqual) \
+ V(Simd128Load) \
+ V(Simd128Load1) \
+ V(Simd128Load2) \
+ V(Simd128Load3) \
+ V(Simd128Store) \
+ V(Simd128Store1) \
+ V(Simd128Store2) \
+ V(Simd128Store3) \
+ V(Simd128Zero) \
+ V(Simd128And) \
+ V(Simd128Or) \
+ V(Simd128Xor) \
+ V(Simd128Not) \
+ V(Simd32x4Select) \
+ V(Simd32x4Swizzle) \
+ V(Simd32x4Shuffle) \
+ V(Simd16x8Select) \
+ V(Simd16x8Swizzle) \
+ V(Simd16x8Shuffle) \
+ V(Simd8x16Select) \
+ V(Simd8x16Swizzle) \
+ V(Simd8x16Shuffle) \
+ V(Simd1x4Zero) \
+ V(Simd1x4And) \
+ V(Simd1x4Or) \
+ V(Simd1x4Xor) \
+ V(Simd1x4Not) \
+ V(Simd1x4AnyTrue) \
+ V(Simd1x4AllTrue) \
+ V(Simd1x8Zero) \
+ V(Simd1x8And) \
+ V(Simd1x8Or) \
+ V(Simd1x8Xor) \
+ V(Simd1x8Not) \
+ V(Simd1x8AnyTrue) \
+ V(Simd1x8AllTrue) \
+ V(Simd1x16Zero) \
+ V(Simd1x16And) \
+ V(Simd1x16Or) \
+ V(Simd1x16Xor) \
+ V(Simd1x16Not) \
+ V(Simd1x16AnyTrue) \
+ V(Simd1x16AllTrue)
#define VALUE_OP_LIST(V) \
COMMON_OP_LIST(V) \
« no previous file with comments | « src/compiler/machine-operator.cc ('k') | src/compiler/wasm-compiler.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698