Implement remaining Boolean SIMD operations on ARM.

src/compiler/wasm-compiler.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/wasm-compiler.h"
 
 #include <memory>
 
 #include "src/assembler-inl.h"
 #include "src/base/platform/elapsed-timer.h"
@@ skipping 3592 matching lines @@
       return graph()->NewNode(
           jsgraph()->machine()->Uint8x16GreaterThanOrEqual(), inputs[1],
           inputs[0]);
     case wasm::kExprI8x16GtU:
       return graph()->NewNode(jsgraph()->machine()->Uint8x16GreaterThan(),
                               inputs[0], inputs[1]);
     case wasm::kExprI8x16GeU:
       return graph()->NewNode(
           jsgraph()->machine()->Uint8x16GreaterThanOrEqual(), inputs[0],
           inputs[1]);
+    case wasm::kExprS128And:
+      return graph()->NewNode(jsgraph()->machine()->Simd128And(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS128Or:
+      return graph()->NewNode(jsgraph()->machine()->Simd128Or(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS128Xor:
+      return graph()->NewNode(jsgraph()->machine()->Simd128Xor(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS128Not:
+      return graph()->NewNode(jsgraph()->machine()->Simd128Not(), inputs[0]);
     case wasm::kExprS32x4Select:
       return graph()->NewNode(jsgraph()->machine()->Simd32x4Select(), inputs[0],
                               inputs[1], inputs[2]);
     case wasm::kExprS16x8Select:
       return graph()->NewNode(jsgraph()->machine()->Simd16x8Select(), inputs[0],
                               inputs[1], inputs[2]);
     case wasm::kExprS8x16Select:
       return graph()->NewNode(jsgraph()->machine()->Simd8x16Select(), inputs[0],
                               inputs[1], inputs[2]);
-    case wasm::kExprS128And:
-      return graph()->NewNode(jsgraph()->machine()->Simd128And(), inputs[0],
+    case wasm::kExprS1x4And:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x4And(), inputs[0],
                               inputs[1]);
-    case wasm::kExprS128Or:
-      return graph()->NewNode(jsgraph()->machine()->Simd128Or(), inputs[0],
+    case wasm::kExprS1x4Or:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x4Or(), inputs[0],
                               inputs[1]);
-    case wasm::kExprS128Xor:
-      return graph()->NewNode(jsgraph()->machine()->Simd128Xor(), inputs[0],
+    case wasm::kExprS1x4Xor:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x4Xor(), inputs[0],
                               inputs[1]);
-    case wasm::kExprS128Not:
-      return graph()->NewNode(jsgraph()->machine()->Simd128Not(), inputs[0]);
+    case wasm::kExprS1x4Not:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x4Not(), inputs[0]);
+    case wasm::kExprS1x4AnyTrue:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x4AnyTrue(),
+                              inputs[0]);
+    case wasm::kExprS1x4AllTrue:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x4AllTrue(),
+                              inputs[0]);
+    case wasm::kExprS1x8And:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x8And(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS1x8Or:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x8Or(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS1x8Xor:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x8Xor(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS1x8Not:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x8Not(), inputs[0]);
+    case wasm::kExprS1x8AnyTrue:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x8AnyTrue(),
+                              inputs[0]);
+    case wasm::kExprS1x8AllTrue:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x8AllTrue(),
+                              inputs[0]);
+    case wasm::kExprS1x16And:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x16And(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS1x16Or:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x16Or(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS1x16Xor:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x16Xor(), inputs[0],
+                              inputs[1]);
+    case wasm::kExprS1x16Not:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x16Not(), inputs[0]);
+    case wasm::kExprS1x16AnyTrue:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x16AnyTrue(),
+                              inputs[0]);
+    case wasm::kExprS1x16AllTrue:
+      return graph()->NewNode(jsgraph()->machine()->Simd1x16AllTrue(),
+                              inputs[0]);
     default:
       return graph()->NewNode(UnsupportedOpcode(opcode), nullptr);
   }
 }
 
 Node* WasmGraphBuilder::SimdLaneOp(wasm::WasmOpcode opcode, uint8_t lane,
                                    const NodeVector& inputs) {
   has_simd_ = true;
   switch (opcode) {
     case wasm::kExprF32x4ExtractLane:
@@ skipping 522 matching lines @@
            function_->code_end_offset - function_->code_start_offset,
            codegen_ms);
   }
 
   return code;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8