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Side by Side Diff: src/compiler/opcodes.h

Issue 2711863002: Implement remaining Boolean SIMD operations on ARM. (Closed)
Patch Set: Fix macro assembler test. Created 3 years, 9 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_OPCODES_H_ 5 #ifndef V8_COMPILER_OPCODES_H_
6 #define V8_COMPILER_OPCODES_H_ 6 #define V8_COMPILER_OPCODES_H_
7 7
8 #include <iosfwd> 8 #include <iosfwd>
9 9
10 #include "src/globals.h" 10 #include "src/globals.h"
(...skipping 534 matching lines...) Expand 10 before | Expand all | Expand 10 after
545 V(Int32PairMul) \ 545 V(Int32PairMul) \
546 V(Word32PairShl) \ 546 V(Word32PairShl) \
547 V(Word32PairShr) \ 547 V(Word32PairShr) \
548 V(Word32PairSar) \ 548 V(Word32PairSar) \
549 V(ProtectedLoad) \ 549 V(ProtectedLoad) \
550 V(ProtectedStore) \ 550 V(ProtectedStore) \
551 V(AtomicLoad) \ 551 V(AtomicLoad) \
552 V(AtomicStore) \ 552 V(AtomicStore) \
553 V(UnsafePointerAdd) 553 V(UnsafePointerAdd)
554 554
555 #define MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \ 555 #define MACHINE_SIMD_OP_LIST(V) \
556 V(Float32x4Splat) \ 556 V(Float32x4Splat) \
557 V(Float32x4ReplaceLane) \ 557 V(Float32x4ExtractLane) \
558 V(Float32x4Abs) \ 558 V(Float32x4ReplaceLane) \
559 V(Float32x4Neg) \ 559 V(Float32x4Abs) \
560 V(Float32x4Sqrt) \ 560 V(Float32x4Neg) \
561 V(Float32x4RecipApprox) \ 561 V(Float32x4Sqrt) \
562 V(Float32x4RecipSqrtApprox) \ 562 V(Float32x4RecipApprox) \
563 V(Float32x4Add) \ 563 V(Float32x4RecipSqrtApprox) \
564 V(Float32x4Sub) \ 564 V(Float32x4Add) \
565 V(Float32x4Mul) \ 565 V(Float32x4Sub) \
566 V(Float32x4Div) \ 566 V(Float32x4Mul) \
567 V(Float32x4Min) \ 567 V(Float32x4Div) \
568 V(Float32x4Max) \ 568 V(Float32x4Min) \
569 V(Float32x4MinNum) \ 569 V(Float32x4Max) \
570 V(Float32x4MaxNum) \ 570 V(Float32x4MinNum) \
571 V(Float32x4Equal) \ 571 V(Float32x4MaxNum) \
572 V(Float32x4NotEqual) \ 572 V(Float32x4Equal) \
573 V(Float32x4LessThan) \ 573 V(Float32x4NotEqual) \
574 V(Float32x4LessThanOrEqual) \ 574 V(Float32x4LessThan) \
575 V(Float32x4GreaterThan) \ 575 V(Float32x4LessThanOrEqual) \
576 V(Float32x4GreaterThanOrEqual) \ 576 V(Float32x4GreaterThan) \
577 V(Float32x4FromInt32x4) \ 577 V(Float32x4GreaterThanOrEqual) \
578 V(Float32x4FromUint32x4) \ 578 V(Float32x4FromInt32x4) \
579 V(Int32x4Splat) \ 579 V(Float32x4FromUint32x4) \
580 V(Int32x4ReplaceLane) \ 580 V(Int32x4Splat) \
581 V(Int32x4Neg) \ 581 V(Int32x4ExtractLane) \
582 V(Int32x4Add) \ 582 V(Int32x4ReplaceLane) \
583 V(Int32x4Sub) \ 583 V(Int32x4Neg) \
584 V(Int32x4Mul) \ 584 V(Int32x4Add) \
585 V(Int32x4Min) \ 585 V(Int32x4Sub) \
586 V(Int32x4Max) \ 586 V(Int32x4Mul) \
587 V(Int32x4ShiftLeftByScalar) \ 587 V(Int32x4Min) \
588 V(Int32x4ShiftRightByScalar) \ 588 V(Int32x4Max) \
589 V(Int32x4Equal) \ 589 V(Int32x4ShiftLeftByScalar) \
590 V(Int32x4NotEqual) \ 590 V(Int32x4ShiftRightByScalar) \
591 V(Int32x4LessThan) \ 591 V(Int32x4Equal) \
592 V(Int32x4LessThanOrEqual) \ 592 V(Int32x4NotEqual) \
593 V(Int32x4GreaterThan) \ 593 V(Int32x4LessThan) \
594 V(Int32x4GreaterThanOrEqual) \ 594 V(Int32x4LessThanOrEqual) \
595 V(Int32x4FromFloat32x4) \ 595 V(Int32x4GreaterThan) \
596 V(Uint32x4Min) \ 596 V(Int32x4GreaterThanOrEqual) \
597 V(Uint32x4Max) \ 597 V(Int32x4FromFloat32x4) \
598 V(Uint32x4ShiftLeftByScalar) \ 598 V(Uint32x4Min) \
599 V(Uint32x4ShiftRightByScalar) \ 599 V(Uint32x4Max) \
600 V(Uint32x4LessThan) \ 600 V(Uint32x4ShiftLeftByScalar) \
601 V(Uint32x4LessThanOrEqual) \ 601 V(Uint32x4ShiftRightByScalar) \
602 V(Uint32x4GreaterThan) \ 602 V(Uint32x4LessThan) \
603 V(Uint32x4GreaterThanOrEqual) \ 603 V(Uint32x4LessThanOrEqual) \
604 V(Uint32x4FromFloat32x4) \ 604 V(Uint32x4GreaterThan) \
605 V(Bool32x4And) \ 605 V(Uint32x4GreaterThanOrEqual) \
606 V(Bool32x4Or) \ 606 V(Uint32x4FromFloat32x4) \
607 V(Bool32x4Xor) \ 607 V(Int16x8Splat) \
608 V(Bool32x4Not) \ 608 V(Int16x8ExtractLane) \
609 V(Int16x8Splat) \ 609 V(Int16x8ReplaceLane) \
610 V(Int16x8ReplaceLane) \ 610 V(Int16x8Neg) \
611 V(Int16x8Neg) \ 611 V(Int16x8Add) \
612 V(Int16x8Add) \ 612 V(Int16x8AddSaturate) \
613 V(Int16x8AddSaturate) \ 613 V(Int16x8Sub) \
614 V(Int16x8Sub) \ 614 V(Int16x8SubSaturate) \
615 V(Int16x8SubSaturate) \ 615 V(Int16x8Mul) \
616 V(Int16x8Mul) \ 616 V(Int16x8Min) \
617 V(Int16x8Min) \ 617 V(Int16x8Max) \
618 V(Int16x8Max) \ 618 V(Int16x8ShiftLeftByScalar) \
619 V(Int16x8ShiftLeftByScalar) \ 619 V(Int16x8ShiftRightByScalar) \
620 V(Int16x8ShiftRightByScalar) \ 620 V(Int16x8Equal) \
621 V(Int16x8Equal) \ 621 V(Int16x8NotEqual) \
622 V(Int16x8NotEqual) \ 622 V(Int16x8LessThan) \
623 V(Int16x8LessThan) \ 623 V(Int16x8LessThanOrEqual) \
624 V(Int16x8LessThanOrEqual) \ 624 V(Int16x8GreaterThan) \
625 V(Int16x8GreaterThan) \ 625 V(Int16x8GreaterThanOrEqual) \
626 V(Int16x8GreaterThanOrEqual) \ 626 V(Uint16x8AddSaturate) \
627 V(Uint16x8AddSaturate) \ 627 V(Uint16x8SubSaturate) \
628 V(Uint16x8SubSaturate) \ 628 V(Uint16x8Min) \
629 V(Uint16x8Min) \ 629 V(Uint16x8Max) \
630 V(Uint16x8Max) \ 630 V(Uint16x8ShiftLeftByScalar) \
631 V(Uint16x8ShiftLeftByScalar) \ 631 V(Uint16x8ShiftRightByScalar) \
632 V(Uint16x8ShiftRightByScalar) \ 632 V(Uint16x8LessThan) \
633 V(Uint16x8LessThan) \ 633 V(Uint16x8LessThanOrEqual) \
634 V(Uint16x8LessThanOrEqual) \ 634 V(Uint16x8GreaterThan) \
635 V(Uint16x8GreaterThan) \ 635 V(Uint16x8GreaterThanOrEqual) \
636 V(Uint16x8GreaterThanOrEqual) \ 636 V(Int8x16Splat) \
637 V(Bool16x8And) \ 637 V(Int8x16ExtractLane) \
638 V(Bool16x8Or) \ 638 V(Int8x16ReplaceLane) \
639 V(Bool16x8Xor) \ 639 V(Int8x16Neg) \
640 V(Bool16x8Not) \ 640 V(Int8x16Add) \
641 V(Int8x16Splat) \ 641 V(Int8x16AddSaturate) \
642 V(Int8x16ReplaceLane) \ 642 V(Int8x16Sub) \
643 V(Int8x16Neg) \ 643 V(Int8x16SubSaturate) \
644 V(Int8x16Add) \ 644 V(Int8x16Mul) \
645 V(Int8x16AddSaturate) \ 645 V(Int8x16Min) \
646 V(Int8x16Sub) \ 646 V(Int8x16Max) \
647 V(Int8x16SubSaturate) \ 647 V(Int8x16ShiftLeftByScalar) \
648 V(Int8x16Mul) \ 648 V(Int8x16ShiftRightByScalar) \
649 V(Int8x16Min) \ 649 V(Int8x16Equal) \
650 V(Int8x16Max) \ 650 V(Int8x16NotEqual) \
651 V(Int8x16ShiftLeftByScalar) \ 651 V(Int8x16LessThan) \
652 V(Int8x16ShiftRightByScalar) \ 652 V(Int8x16LessThanOrEqual) \
653 V(Int8x16Equal) \ 653 V(Int8x16GreaterThan) \
654 V(Int8x16NotEqual) \ 654 V(Int8x16GreaterThanOrEqual) \
655 V(Int8x16LessThan) \ 655 V(Uint8x16AddSaturate) \
656 V(Int8x16LessThanOrEqual) \ 656 V(Uint8x16SubSaturate) \
657 V(Int8x16GreaterThan) \ 657 V(Uint8x16Min) \
658 V(Int8x16GreaterThanOrEqual) \ 658 V(Uint8x16Max) \
659 V(Uint8x16AddSaturate) \ 659 V(Uint8x16ShiftLeftByScalar) \
660 V(Uint8x16SubSaturate) \ 660 V(Uint8x16ShiftRightByScalar) \
661 V(Uint8x16Min) \ 661 V(Uint8x16LessThan) \
662 V(Uint8x16Max) \ 662 V(Uint8x16LessThanOrEqual) \
663 V(Uint8x16ShiftLeftByScalar) \ 663 V(Uint8x16GreaterThan) \
664 V(Uint8x16ShiftRightByScalar) \ 664 V(Uint8x16GreaterThanOrEqual) \
665 V(Uint8x16LessThan) \ 665 V(Simd128Load) \
666 V(Uint8x16LessThanOrEqual) \ 666 V(Simd128Load1) \
667 V(Uint8x16GreaterThan) \ 667 V(Simd128Load2) \
668 V(Uint8x16GreaterThanOrEqual) \ 668 V(Simd128Load3) \
669 V(Bool8x16And) \ 669 V(Simd128Store) \
670 V(Bool8x16Or) \ 670 V(Simd128Store1) \
671 V(Bool8x16Xor) \ 671 V(Simd128Store2) \
672 V(Bool8x16Not) \ 672 V(Simd128Store3) \
673 V(Simd128Zero) \ 673 V(Simd128Zero) \
674 V(Simd128And) \ 674 V(Simd128And) \
675 V(Simd128Or) \ 675 V(Simd128Or) \
676 V(Simd128Xor) \ 676 V(Simd128Xor) \
677 V(Simd128Not) \ 677 V(Simd128Not) \
678 V(Simd32x4Select) \ 678 V(Simd32x4Select) \
679 V(Simd32x4Swizzle) \ 679 V(Simd32x4Swizzle) \
680 V(Simd32x4Shuffle) \ 680 V(Simd32x4Shuffle) \
681 V(Simd16x8Select) \ 681 V(Simd16x8Select) \
682 V(Simd16x8Swizzle) \ 682 V(Simd16x8Swizzle) \
683 V(Simd16x8Shuffle) \ 683 V(Simd16x8Shuffle) \
684 V(Simd8x16Select) \ 684 V(Simd8x16Select) \
685 V(Simd8x16Swizzle) \ 685 V(Simd8x16Swizzle) \
686 V(Simd8x16Shuffle) \ 686 V(Simd8x16Shuffle) \
687 V(Simd1x4Zero) \ 687 V(Simd1x4Zero) \
688 V(Simd1x8Zero) \ 688 V(Simd1x4And) \
689 V(Simd1x16Zero) 689 V(Simd1x4Or) \
690 690 V(Simd1x4Xor) \
691 #define MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \ 691 V(Simd1x4Not) \
692 V(Float32x4ExtractLane) \ 692 V(Simd1x4AnyTrue) \
693 V(Int32x4ExtractLane) \ 693 V(Simd1x4AllTrue) \
694 V(Int16x8ExtractLane) \ 694 V(Simd1x8Zero) \
695 V(Int8x16ExtractLane) 695 V(Simd1x8And) \
696 696 V(Simd1x8Or) \
697 #define MACHINE_SIMD_RETURN_BOOL_OP_LIST(V) \ 697 V(Simd1x8Xor) \
698 V(Bool32x4AnyTrue) \ 698 V(Simd1x8Not) \
699 V(Bool32x4AllTrue) \ 699 V(Simd1x8AnyTrue) \
700 V(Bool16x8AnyTrue) \ 700 V(Simd1x8AllTrue) \
701 V(Bool16x8AllTrue) \ 701 V(Simd1x16Zero) \
702 V(Bool8x16AnyTrue) \ 702 V(Simd1x16And) \
703 V(Bool8x16AllTrue) 703 V(Simd1x16Or) \
704 704 V(Simd1x16Xor) \
705 #define MACHINE_SIMD_GENERIC_OP_LIST(V) \ 705 V(Simd1x16Not) \
706 V(Simd128Load) \ 706 V(Simd1x16AnyTrue) \
707 V(Simd128Load1) \ 707 V(Simd1x16AllTrue)
708 V(Simd128Load2) \
709 V(Simd128Load3) \
710 V(Simd128Store) \
711 V(Simd128Store1) \
712 V(Simd128Store2) \
713 V(Simd128Store3)
714
715 #define MACHINE_SIMD_OP_LIST(V) \
716 MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \
717 MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
718 MACHINE_SIMD_RETURN_BOOL_OP_LIST(V) \
719 MACHINE_SIMD_GENERIC_OP_LIST(V)
720 708
721 #define VALUE_OP_LIST(V) \ 709 #define VALUE_OP_LIST(V) \
722 COMMON_OP_LIST(V) \ 710 COMMON_OP_LIST(V) \
723 SIMPLIFIED_OP_LIST(V) \ 711 SIMPLIFIED_OP_LIST(V) \
724 MACHINE_OP_LIST(V) \ 712 MACHINE_OP_LIST(V) \
725 MACHINE_SIMD_OP_LIST(V) \ 713 MACHINE_SIMD_OP_LIST(V) \
726 JS_OP_LIST(V) 714 JS_OP_LIST(V)
727 715
728 // The combination of all operators at all levels and the common operators. 716 // The combination of all operators at all levels and the common operators.
729 #define ALL_OP_LIST(V) \ 717 #define ALL_OP_LIST(V) \
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
800 } 788 }
801 }; 789 };
802 790
803 V8_EXPORT_PRIVATE std::ostream& operator<<(std::ostream&, IrOpcode::Value); 791 V8_EXPORT_PRIVATE std::ostream& operator<<(std::ostream&, IrOpcode::Value);
804 792
805 } // namespace compiler 793 } // namespace compiler
806 } // namespace internal 794 } // namespace internal
807 } // namespace v8 795 } // namespace v8
808 796
809 #endif // V8_COMPILER_OPCODES_H_ 797 #endif // V8_COMPILER_OPCODES_H_
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