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Issue 2711863002: Implement remaining Boolean SIMD operations on ARM. (Closed)
Patch Set: Fix macro assembler test. Created 3 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #if V8_TARGET_ARCH_ARM 7 #if V8_TARGET_ARCH_ARM
8 8
9 #include "src/assembler-inl.h" 9 #include "src/assembler-inl.h"
10 #include "src/base/bits.h" 10 #include "src/base/bits.h"
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1155 int size = NeonSz(dt); // 0, 1, 2 1155 int size = NeonSz(dt); // 0, 1, 2
1156 int byte = lane << size; 1156 int byte = lane << size;
1157 int double_word = byte >> kDoubleSizeLog2; 1157 int double_word = byte >> kDoubleSizeLog2;
1158 int double_byte = byte & (kDoubleSize - 1); 1158 int double_byte = byte & (kDoubleSize - 1);
1159 int double_lane = double_byte >> size; 1159 int double_lane = double_byte >> size;
1160 DwVfpRegister double_source = 1160 DwVfpRegister double_source =
1161 DwVfpRegister::from_code(src.code() * 2 + double_word); 1161 DwVfpRegister::from_code(src.code() * 2 + double_word);
1162 vmov(dt, dst, double_source, double_lane); 1162 vmov(dt, dst, double_source, double_lane);
1163 } 1163 }
1164 1164
1165 void MacroAssembler::ExtractLane(Register dst, DwVfpRegister src,
1166 NeonDataType dt, int lane) {
1167 int size = NeonSz(dt); // 0, 1, 2
1168 int byte = lane << size;
1169 int double_byte = byte & (kDoubleSize - 1);
1170 int double_lane = double_byte >> size;
1171 vmov(dt, dst, src, double_lane);
1172 }
1173
1165 void MacroAssembler::ExtractLane(SwVfpRegister dst, QwNeonRegister src, 1174 void MacroAssembler::ExtractLane(SwVfpRegister dst, QwNeonRegister src,
1166 Register scratch, int lane) { 1175 Register scratch, int lane) {
1167 int s_code = src.code() * 4 + lane; 1176 int s_code = src.code() * 4 + lane;
1168 VmovExtended(dst.code(), s_code, scratch); 1177 VmovExtended(dst.code(), s_code, scratch);
1169 } 1178 }
1170 1179
1171 void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src, 1180 void MacroAssembler::ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
1172 Register src_lane, NeonDataType dt, int lane) { 1181 Register src_lane, NeonDataType dt, int lane) {
1173 Move(dst, src); 1182 Move(dst, src);
1174 int size = NeonSz(dt); // 0, 1, 2 1183 int size = NeonSz(dt); // 0, 1, 2
(...skipping 2710 matching lines...) Expand 10 before | Expand all | Expand 10 after
3885 } 3894 }
3886 } 3895 }
3887 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); 3896 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift));
3888 add(result, result, Operand(dividend, LSR, 31)); 3897 add(result, result, Operand(dividend, LSR, 31));
3889 } 3898 }
3890 3899
3891 } // namespace internal 3900 } // namespace internal
3892 } // namespace v8 3901 } // namespace v8
3893 3902
3894 #endif // V8_TARGET_ARCH_ARM 3903 #endif // V8_TARGET_ARCH_ARM
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