PPC: Add OPCODE_LIST macro

src/ppc/simulator-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_PPC
 
@@ skipping 1605 matching lines @@
   }
 
   if (instr->Bit(0) == 1) {  // LK flag set
     special_reg_lr_ = old_pc + 4;
   }
 }
 
 
 // Handle execution based on instruction types.
 void Simulator::ExecuteExt1(Instruction* instr) {
-  switch (instr->Bits(10, 1) << 1) {
+  uint32_t opcode = EXT1 | instr->BitField(10, 1);
+  switch (opcode) {
     case MCRF:
       UNIMPLEMENTED();  // Not used by V8.
     case BCLRX:
       ExecuteBranchConditional(instr, BC_LINK_REG);
       break;
     case BCCTRX:
       ExecuteBranchConditional(instr, BC_CTR_REG);
       break;
     case CRNOR:
     case RFI:
@@ skipping 34 matching lines @@
     default: {
       UNIMPLEMENTED();  // Not used by V8.
     }
   }
 }
 
 
 bool Simulator::ExecuteExt2_10bit(Instruction* instr) {
   bool found = true;
 
-  int opcode = instr->Bits(10, 1) << 1;
+  uint32_t opcode = EXT2 | instr->BitField(10, 1);
   switch (opcode) {
     case SRWX: {
       int rs = instr->RSValue();
       int ra = instr->RAValue();
       int rb = instr->RBValue();
       uint32_t rs_val = get_register(rs);
       uintptr_t rb_val = get_register(rb) & 0x3f;
       intptr_t result = (rb_val > 31) ? 0 : rs_val >> rb_val;
       set_register(ra, result);
       if (instr->Bit(0)) {  // RC bit set
@@ skipping 250 matching lines @@
     }
     default: {
       found = false;
       break;
     }
   }
 
   if (found) return found;
 
   found = true;
-  opcode = instr->Bits(10, 2) << 2;
+  opcode = EXT2 | instr->BitField(10, 2);
   switch (opcode) {
     case SRADIX: {
       int ra = instr->RAValue();
       int rs = instr->RSValue();
       int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
       intptr_t rs_val = get_register(rs);
       intptr_t result = rs_val >> sh;
       set_register(ra, result);
       if (instr->Bit(0)) {  // RC bit set
         SetCR0(result);
       }
       break;
     }
     default: {
       found = false;
       break;
     }
   }
 
   return found;
 }
 
 
 bool Simulator::ExecuteExt2_9bit_part1(Instruction* instr) {
   bool found = true;
 
-  int opcode = instr->Bits(9, 1) << 1;
+  uint32_t opcode = EXT2 | instr->BitField(9, 1);
   switch (opcode) {
     case TW: {
       // used for call redirection in simulation mode
       SoftwareInterrupt(instr);
       break;
     }
     case CMP: {
       int ra = instr->RAValue();
       int rb = instr->RBValue();
       int cr = instr->Bits(25, 23);
@@ skipping 237 matching lines @@
       break;
     }
   }
 
   return found;
 }
 
 
 bool Simulator::ExecuteExt2_9bit_part2(Instruction* instr) {
   bool found = true;
-  int opcode = instr->Bits(9, 1) << 1;
+  uint32_t opcode = EXT2 | instr->BitField(9, 1);
   switch (opcode) {
     case CNTLZWX: {
       int rs = instr->RSValue();
       int ra = instr->RAValue();
       uintptr_t rs_val = get_register(rs);
       uintptr_t count = 0;
       int n = 0;
       uintptr_t bit = 0x80000000;
       for (; n < 32; n++) {
         if (bit & rs_val) break;
@@ skipping 497 matching lines @@
       found = false;
       break;
     }
   }
 
   return found;
 }
 
 
 void Simulator::ExecuteExt2_5bit(Instruction* instr) {
-  int opcode = instr->Bits(5, 1) << 1;
+  uint32_t opcode = EXT2 | instr->BitField(5, 1);
   switch (opcode) {
     case ISEL: {
       int rt = instr->RTValue();
       int ra = instr->RAValue();
       int rb = instr->RBValue();
       int condition_bit = instr->RCValue();
       int condition_mask = 0x80000000 >> condition_bit;
       intptr_t ra_val = (ra == 0) ? 0 : get_register(ra);
       intptr_t rb_val = get_register(rb);
       intptr_t value = (condition_reg_ & condition_mask) ? ra_val : rb_val;
@@ skipping 12 matching lines @@
   // Check first the 10-1 bit versions
   if (ExecuteExt2_10bit(instr)) return;
   // Now look at the lesser encodings
   if (ExecuteExt2_9bit_part1(instr)) return;
   if (ExecuteExt2_9bit_part2(instr)) return;
   ExecuteExt2_5bit(instr);
 }
 
 
 void Simulator::ExecuteExt3(Instruction* instr) {
-  int opcode = instr->Bits(10, 1) << 1;
+  uint32_t opcode = EXT3 | instr->BitField(10, 1);
   switch (opcode) {
-    case FCFID: {
+    case FCFIDS: {
       // fcfids
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       int64_t frb_val = get_d_register(frb);
       double frt_val = static_cast<float>(frb_val);
       set_d_register_from_double(frt, frt_val);
       return;
     }
-    case FCFIDU: {
+    case FCFIDUS: {
       // fcfidus
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       uint64_t frb_val = get_d_register(frb);
       double frt_val = static_cast<float>(frb_val);
       set_d_register_from_double(frt, frt_val);
       return;
     }
   }
   UNIMPLEMENTED();  // Not used by V8.
 }
 
 
 void Simulator::ExecuteExt4(Instruction* instr) {
-  switch (instr->Bits(5, 1) << 1) {
+  uint32_t opcode = EXT4 | instr->BitField(5, 1);
+  switch (opcode) {
     case FDIV: {
       int frt = instr->RTValue();
       int fra = instr->RAValue();
       int frb = instr->RBValue();
       double fra_val = get_double_from_d_register(fra);
       double frb_val = get_double_from_d_register(frb);
       double frt_val = fra_val / frb_val;
       set_d_register_from_double(frt, frt_val);
       return;
     }
@@ skipping 66 matching lines @@
       int frb = instr->RBValue();
       int frc = instr->RCValue();
       double fra_val = get_double_from_d_register(fra);
       double frb_val = get_double_from_d_register(frb);
       double frc_val = get_double_from_d_register(frc);
       double frt_val = (fra_val * frc_val) + frb_val;
       set_d_register_from_double(frt, frt_val);
       return;
     }
   }
-  int opcode = instr->Bits(10, 1) << 1;
+  opcode = EXT4 | instr->BitField(10, 1);
   switch (opcode) {
     case FCMPU: {
       int fra = instr->RAValue();
       int frb = instr->RBValue();
       double fra_val = get_double_from_d_register(fra);
       double frb_val = get_double_from_d_register(frb);
       int cr = instr->Bits(25, 23);
       int bf = 0;
       if (fra_val < frb_val) {
         bf |= 0x80000000;
@@ skipping 317 matching lines @@
       double frt_val = std::fabs(frb_val);
       set_d_register_from_double(frt, frt_val);
       return;
     }
   }
   UNIMPLEMENTED();  // Not used by V8.
 }
 
 #if V8_TARGET_ARCH_PPC64
 void Simulator::ExecuteExt5(Instruction* instr) {
-  switch (instr->Bits(4, 2) << 2) {
+  uint32_t opcode = EXT5 | instr->BitField(4, 2);
+  switch (opcode) {
     case RLDICL: {
       int ra = instr->RAValue();
       int rs = instr->RSValue();
       uintptr_t rs_val = get_register(rs);
       int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
       int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
       DCHECK(sh >= 0 && sh <= 63);
       DCHECK(mb >= 0 && mb <= 63);
       uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
       uintptr_t mask = 0xffffffffffffffff >> mb;
@@ skipping 67 matching lines @@
       result &= mask;
       ra_val &= ~mask;
       result |= ra_val;
       set_register(ra, result);
       if (instr->Bit(0)) {  // RC bit set
         SetCR0(result);
       }
       return;
     }
   }
-  switch (instr->Bits(4, 1) << 1) {
+  opcode = EXT5 | instr->BitField(4, 1);
+  switch (opcode) {
     case RLDCL: {
       int ra = instr->RAValue();
       int rs = instr->RSValue();
       int rb = instr->RBValue();
       uintptr_t rs_val = get_register(rs);
       uintptr_t rb_val = get_register(rb);
       int sh = (rb_val & 0x3f);
       int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
       DCHECK(sh >= 0 && sh <= 63);
       DCHECK(mb >= 0 && mb <= 63);
       uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
       uintptr_t mask = 0xffffffffffffffff >> mb;
       result &= mask;
       set_register(ra, result);
       if (instr->Bit(0)) {  // RC bit set
         SetCR0(result);
       }
       return;
     }
   }
   UNIMPLEMENTED();  // Not used by V8.
 }
 #endif
 
 void Simulator::ExecuteExt6(Instruction* instr) {
-  switch (instr->Bits(10, 3) << 3) {
+  uint32_t opcode = EXT6 | instr->BitField(10, 3);
+  switch (opcode) {
     case XSADDDP: {
       int frt = instr->RTValue();
       int fra = instr->RAValue();
       int frb = instr->RBValue();
       double fra_val = get_double_from_d_register(fra);
       double frb_val = get_double_from_d_register(frb);
       double frt_val = fra_val + frb_val;
       set_d_register_from_double(frt, frt_val);
       return;
     }
@@ skipping 25 matching lines @@
       double frb_val = get_double_from_d_register(frb);
       double frt_val = fra_val / frb_val;
       set_d_register_from_double(frt, frt_val);
       return;
     }
   }
   UNIMPLEMENTED();  // Not used by V8.
 }
 
 void Simulator::ExecuteGeneric(Instruction* instr) {
-  int opcode = instr->OpcodeValue() << 26;
+  uint32_t opcode = instr->OpcodeField();
   switch (opcode) {
     case SUBFIC: {
       int rt = instr->RTValue();
       int ra = instr->RAValue();
       intptr_t ra_val = get_register(ra);
       int32_t im_val = instr->Bits(15, 0);
       im_val = SIGN_EXT_IMM16(im_val);
       intptr_t alu_out = im_val - ra_val;
       set_register(rt, alu_out);
       // todo - handle RC bit
@@ skipping 546 matching lines @@
 
 // Executes the current instruction.
 void Simulator::ExecuteInstruction(Instruction* instr) {
   if (v8::internal::FLAG_check_icache) {
     CheckICache(isolate_->simulator_i_cache(), instr);
   }
   pc_modified_ = false;
   if (::v8::internal::FLAG_trace_sim) {
     Trace(instr);
   }
-  int opcode = instr->OpcodeValue() << 26;
+  uint32_t opcode = instr->OpcodeField();
   if (opcode == TWI) {
     SoftwareInterrupt(instr);
   } else {
     ExecuteGeneric(instr);
   }
   if (!pc_modified_) {
     set_pc(reinterpret_cast<intptr_t>(instr) + Instruction::kInstrSize);
   }
 }
 
@@ skipping 228 matching lines @@
   uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
   uintptr_t address = *stack_slot;
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 #endif  // V8_TARGET_ARCH_PPC