[V8] Implement remaining SIMD operations on ARM.

src/compiler/instruction-selector.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector.h"
 
 #include <limits>
 
 #include "src/base/adapters.h"
 #include "src/compiler/compiler-source-position-table.h"
@@ skipping 1457 matching lines @@
       return MarkAsSimd128(node), VisitFloat32x4FromUint32x4(node);
     case IrOpcode::kFloat32x4Abs:
       return MarkAsSimd128(node), VisitFloat32x4Abs(node);
     case IrOpcode::kFloat32x4Neg:
       return MarkAsSimd128(node), VisitFloat32x4Neg(node);
     case IrOpcode::kFloat32x4Add:
       return MarkAsSimd128(node), VisitFloat32x4Add(node);
     case IrOpcode::kFloat32x4Sub:
       return MarkAsSimd128(node), VisitFloat32x4Sub(node);
     case IrOpcode::kFloat32x4Equal:
-      return MarkAsSimd128(node), VisitFloat32x4Equal(node);
+      return MarkAsSimd1x4(node), VisitFloat32x4Equal(node);
     case IrOpcode::kFloat32x4NotEqual:
-      return MarkAsSimd128(node), VisitFloat32x4NotEqual(node);
+      return MarkAsSimd1x4(node), VisitFloat32x4NotEqual(node);
     case IrOpcode::kCreateInt32x4:
       return MarkAsSimd128(node), VisitCreateInt32x4(node);
     case IrOpcode::kInt32x4ExtractLane:
       return MarkAsWord32(node), VisitInt32x4ExtractLane(node);
     case IrOpcode::kInt32x4ReplaceLane:
       return MarkAsSimd128(node), VisitInt32x4ReplaceLane(node);
     case IrOpcode::kInt32x4FromFloat32x4:
       return MarkAsSimd128(node), VisitInt32x4FromFloat32x4(node);
     case IrOpcode::kUint32x4FromFloat32x4:
       return MarkAsSimd128(node), VisitUint32x4FromFloat32x4(node);
     case IrOpcode::kInt32x4Neg:
       return MarkAsSimd128(node), VisitInt32x4Neg(node);
     case IrOpcode::kInt32x4ShiftLeftByScalar:
       return MarkAsSimd128(node), VisitInt32x4ShiftLeftByScalar(node);
     case IrOpcode::kInt32x4ShiftRightByScalar:
       return MarkAsSimd128(node), VisitInt32x4ShiftRightByScalar(node);
     case IrOpcode::kInt32x4Add:
       return MarkAsSimd128(node), VisitInt32x4Add(node);
     case IrOpcode::kInt32x4Sub:
       return MarkAsSimd128(node), VisitInt32x4Sub(node);
     case IrOpcode::kInt32x4Mul:
       return MarkAsSimd128(node), VisitInt32x4Mul(node);
     case IrOpcode::kInt32x4Min:
       return MarkAsSimd128(node), VisitInt32x4Min(node);
     case IrOpcode::kInt32x4Max:
       return MarkAsSimd128(node), VisitInt32x4Max(node);
     case IrOpcode::kInt32x4Equal:
-      return MarkAsSimd128(node), VisitInt32x4Equal(node);
+      return MarkAsSimd1x4(node), VisitInt32x4Equal(node);
     case IrOpcode::kInt32x4NotEqual:
-      return MarkAsSimd128(node), VisitInt32x4NotEqual(node);
+      return MarkAsSimd1x4(node), VisitInt32x4NotEqual(node);
     case IrOpcode::kInt32x4GreaterThan:
-      return MarkAsSimd128(node), VisitInt32x4GreaterThan(node);
+      return MarkAsSimd1x4(node), VisitInt32x4GreaterThan(node);
     case IrOpcode::kInt32x4GreaterThanOrEqual:
-      return MarkAsSimd128(node), VisitInt32x4GreaterThanOrEqual(node);
+      return MarkAsSimd1x4(node), VisitInt32x4GreaterThanOrEqual(node);
     case IrOpcode::kUint32x4ShiftRightByScalar:
       return MarkAsSimd128(node), VisitUint32x4ShiftRightByScalar(node);
     case IrOpcode::kUint32x4Min:
       return MarkAsSimd128(node), VisitUint32x4Min(node);
     case IrOpcode::kUint32x4Max:
       return MarkAsSimd128(node), VisitUint32x4Max(node);
     case IrOpcode::kUint32x4GreaterThan:
-      return MarkAsSimd128(node), VisitUint32x4GreaterThan(node);
+      return MarkAsSimd1x4(node), VisitUint32x4GreaterThan(node);
     case IrOpcode::kUint32x4GreaterThanOrEqual:
-      return MarkAsSimd128(node), VisitUint32x4GreaterThanOrEqual(node);
+      return MarkAsSimd1x4(node), VisitUint32x4GreaterThanOrEqual(node);
     case IrOpcode::kCreateInt16x8:
       return MarkAsSimd128(node), VisitCreateInt16x8(node);
     case IrOpcode::kInt16x8ExtractLane:
       return MarkAsWord32(node), VisitInt16x8ExtractLane(node);
     case IrOpcode::kInt16x8ReplaceLane:
       return MarkAsSimd128(node), VisitInt16x8ReplaceLane(node);
     case IrOpcode::kInt16x8Neg:
       return MarkAsSimd128(node), VisitInt16x8Neg(node);
     case IrOpcode::kInt16x8ShiftLeftByScalar:
       return MarkAsSimd128(node), VisitInt16x8ShiftLeftByScalar(node);
     case IrOpcode::kInt16x8ShiftRightByScalar:
       return MarkAsSimd128(node), VisitInt16x8ShiftRightByScalar(node);
     case IrOpcode::kInt16x8Add:
       return MarkAsSimd128(node), VisitInt16x8Add(node);
     case IrOpcode::kInt16x8AddSaturate:
       return MarkAsSimd128(node), VisitInt16x8AddSaturate(node);
     case IrOpcode::kInt16x8Sub:
       return MarkAsSimd128(node), VisitInt16x8Sub(node);
     case IrOpcode::kInt16x8SubSaturate:
       return MarkAsSimd128(node), VisitInt16x8SubSaturate(node);
     case IrOpcode::kInt16x8Mul:
       return MarkAsSimd128(node), VisitInt16x8Mul(node);
     case IrOpcode::kInt16x8Min:
       return MarkAsSimd128(node), VisitInt16x8Min(node);
     case IrOpcode::kInt16x8Max:
       return MarkAsSimd128(node), VisitInt16x8Max(node);
     case IrOpcode::kInt16x8Equal:
-      return MarkAsSimd128(node), VisitInt16x8Equal(node);
+      return MarkAsSimd1x8(node), VisitInt16x8Equal(node);
     case IrOpcode::kInt16x8NotEqual:
-      return MarkAsSimd128(node), VisitInt16x8NotEqual(node);
+      return MarkAsSimd1x8(node), VisitInt16x8NotEqual(node);
     case IrOpcode::kInt16x8GreaterThan:
-      return MarkAsSimd128(node), VisitInt16x8GreaterThan(node);
+      return MarkAsSimd1x8(node), VisitInt16x8GreaterThan(node);
     case IrOpcode::kInt16x8GreaterThanOrEqual:
-      return MarkAsSimd128(node), VisitInt16x8GreaterThanOrEqual(node);
+      return MarkAsSimd1x8(node), VisitInt16x8GreaterThanOrEqual(node);
     case IrOpcode::kUint16x8ShiftRightByScalar:
       return MarkAsSimd128(node), VisitUint16x8ShiftRightByScalar(node);
     case IrOpcode::kUint16x8AddSaturate:
       return MarkAsSimd128(node), VisitUint16x8AddSaturate(node);
     case IrOpcode::kUint16x8SubSaturate:
       return MarkAsSimd128(node), VisitUint16x8SubSaturate(node);
     case IrOpcode::kUint16x8Min:
       return MarkAsSimd128(node), VisitUint16x8Min(node);
     case IrOpcode::kUint16x8Max:
       return MarkAsSimd128(node), VisitUint16x8Max(node);
     case IrOpcode::kUint16x8GreaterThan:
-      return MarkAsSimd128(node), VisitUint16x8GreaterThan(node);
+      return MarkAsSimd1x8(node), VisitUint16x8GreaterThan(node);
     case IrOpcode::kUint16x8GreaterThanOrEqual:
-      return MarkAsSimd128(node), VisitUint16x8GreaterThanOrEqual(node);
+      return MarkAsSimd1x8(node), VisitUint16x8GreaterThanOrEqual(node);
     case IrOpcode::kCreateInt8x16:
       return MarkAsSimd128(node), VisitCreateInt8x16(node);
     case IrOpcode::kInt8x16ExtractLane:
       return MarkAsWord32(node), VisitInt8x16ExtractLane(node);
     case IrOpcode::kInt8x16ReplaceLane:
       return MarkAsSimd128(node), VisitInt8x16ReplaceLane(node);
     case IrOpcode::kInt8x16Neg:
       return MarkAsSimd128(node), VisitInt8x16Neg(node);
     case IrOpcode::kInt8x16ShiftLeftByScalar:
       return MarkAsSimd128(node), VisitInt8x16ShiftLeftByScalar(node);
     case IrOpcode::kInt8x16ShiftRightByScalar:
       return MarkAsSimd128(node), VisitInt8x16ShiftRightByScalar(node);
     case IrOpcode::kInt8x16Add:
       return MarkAsSimd128(node), VisitInt8x16Add(node);
     case IrOpcode::kInt8x16AddSaturate:
       return MarkAsSimd128(node), VisitInt8x16AddSaturate(node);
     case IrOpcode::kInt8x16Sub:
       return MarkAsSimd128(node), VisitInt8x16Sub(node);
     case IrOpcode::kInt8x16SubSaturate:
       return MarkAsSimd128(node), VisitInt8x16SubSaturate(node);
     case IrOpcode::kInt8x16Mul:
       return MarkAsSimd128(node), VisitInt8x16Mul(node);
     case IrOpcode::kInt8x16Min:
       return MarkAsSimd128(node), VisitInt8x16Min(node);
     case IrOpcode::kInt8x16Max:
       return MarkAsSimd128(node), VisitInt8x16Max(node);
     case IrOpcode::kInt8x16Equal:
-      return MarkAsSimd128(node), VisitInt8x16Equal(node);
+      return MarkAsSimd1x16(node), VisitInt8x16Equal(node);
     case IrOpcode::kInt8x16NotEqual:
-      return MarkAsSimd128(node), VisitInt8x16NotEqual(node);
+      return MarkAsSimd1x16(node), VisitInt8x16NotEqual(node);
     case IrOpcode::kInt8x16GreaterThan:
-      return MarkAsSimd128(node), VisitInt8x16GreaterThan(node);
+      return MarkAsSimd1x16(node), VisitInt8x16GreaterThan(node);
     case IrOpcode::kInt8x16GreaterThanOrEqual:
-      return MarkAsSimd128(node), VisitInt8x16GreaterThanOrEqual(node);
+      return MarkAsSimd1x16(node), VisitInt8x16GreaterThanOrEqual(node);
     case IrOpcode::kUint8x16ShiftRightByScalar:
       return MarkAsSimd128(node), VisitUint8x16ShiftRightByScalar(node);
     case IrOpcode::kUint8x16AddSaturate:
       return MarkAsSimd128(node), VisitUint8x16AddSaturate(node);
     case IrOpcode::kUint8x16SubSaturate:
       return MarkAsSimd128(node), VisitUint8x16SubSaturate(node);
     case IrOpcode::kUint8x16Min:
       return MarkAsSimd128(node), VisitUint8x16Min(node);
     case IrOpcode::kUint8x16Max:
       return MarkAsSimd128(node), VisitUint8x16Max(node);
     case IrOpcode::kUint8x16GreaterThan:
-      return MarkAsSimd128(node), VisitUint8x16GreaterThan(node);
+      return MarkAsSimd1x16(node), VisitUint8x16GreaterThan(node);
     case IrOpcode::kUint8x16GreaterThanOrEqual:
-      return MarkAsSimd128(node), VisitUint16x8GreaterThanOrEqual(node);
+      return MarkAsSimd1x16(node), VisitUint16x8GreaterThanOrEqual(node);
     case IrOpcode::kSimd128And:
       return MarkAsSimd128(node), VisitSimd128And(node);
     case IrOpcode::kSimd128Or:
       return MarkAsSimd128(node), VisitSimd128Or(node);
     case IrOpcode::kSimd128Xor:
       return MarkAsSimd128(node), VisitSimd128Xor(node);
     case IrOpcode::kSimd128Not:
       return MarkAsSimd128(node), VisitSimd128Not(node);
     case IrOpcode::kSimd32x4Select:
       return MarkAsSimd128(node), VisitSimd32x4Select(node);
     case IrOpcode::kSimd16x8Select:
       return MarkAsSimd128(node), VisitSimd16x8Select(node);
     case IrOpcode::kSimd8x16Select:
       return MarkAsSimd128(node), VisitSimd8x16Select(node);
+    case IrOpcode::kSimd1x4AnyTrue:
+      return MarkAsWord32(node), VisitSimd1x4AnyTrue(node);
+    case IrOpcode::kSimd1x4AllTrue:
+      return MarkAsWord32(node), VisitSimd1x4AllTrue(node);
+    case IrOpcode::kSimd1x8AnyTrue:
+      return MarkAsWord32(node), VisitSimd1x8AnyTrue(node);
+    case IrOpcode::kSimd1x8AllTrue:
+      return MarkAsWord32(node), VisitSimd1x8AllTrue(node);
+    case IrOpcode::kSimd1x16AnyTrue:
+      return MarkAsWord32(node), VisitSimd1x16AnyTrue(node);
+    case IrOpcode::kSimd1x16AllTrue:
+      return MarkAsWord32(node), VisitSimd1x16AllTrue(node);
     default:
       V8_Fatal(__FILE__, __LINE__, "Unexpected operator #%d:%s @ node #%d",
                node->opcode(), node->op()->mnemonic(), node->id());
       break;
   }
 }
 
 void InstructionSelector::VisitLoadStackPointer(Node* node) {
   OperandGenerator g(this);
   Emit(kArchStackPointer, g.DefineAsRegister(node));
@@ skipping 573 matching lines @@
 void InstructionSelector::VisitUint8x16Min(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitUint8x16GreaterThan(Node* node) {
   UNIMPLEMENTED();
 }
 
 void InstructionSelector::VisitUint8x16GreaterThanOrEqual(Node* node) {
   UNIMPLEMENTED();
 }
 
-void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitSimd16x8Select(Node* node) { UNIMPLEMENTED(); }
-
-void InstructionSelector::VisitSimd8x16Select(Node* node) { UNIMPLEMENTED(); }
-
 void InstructionSelector::VisitSimd128And(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd128Or(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd128Xor(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitSimd128Not(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd32x4Select(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd16x8Select(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd8x16Select(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x4AnyTrue(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x4AllTrue(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x8AnyTrue(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x8AllTrue(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x16AnyTrue(Node* node) { UNIMPLEMENTED(); }
+
+void InstructionSelector::VisitSimd1x16AllTrue(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_ARM
 
 void InstructionSelector::VisitFinishRegion(Node* node) { EmitIdentity(node); }
 
 void InstructionSelector::VisitParameter(Node* node) {
   OperandGenerator g(this);
   int index = ParameterIndexOf(node->op());
   InstructionOperand op =
       linkage()->ParameterHasSecondaryLocation(index)
           ? g.DefineAsDualLocation(
@@ skipping 360 matching lines @@
   return new (instruction_zone()) FrameStateDescriptor(
       instruction_zone(), state_info.type(), state_info.bailout_id(),
       state_info.state_combine(), parameters, locals, stack,
       state_info.shared_info(), outer_state);
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8