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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. | 
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be | 
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. | 
| 4 | 4 | 
| 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 
| 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 
| 7 | 7 | 
| 8 namespace v8 { | 8 namespace v8 { | 
| 9 namespace internal { | 9 namespace internal { | 
| 10 namespace compiler { | 10 namespace compiler { | 
| (...skipping 187 matching lines...) Expand 10 before | Expand all | Expand 10 after  Loading... | 
| 198   V(ArmUint8x16AddSaturate)        \ | 198   V(ArmUint8x16AddSaturate)        \ | 
| 199   V(ArmUint8x16SubSaturate)        \ | 199   V(ArmUint8x16SubSaturate)        \ | 
| 200   V(ArmUint8x16Min)                \ | 200   V(ArmUint8x16Min)                \ | 
| 201   V(ArmUint8x16Max)                \ | 201   V(ArmUint8x16Max)                \ | 
| 202   V(ArmUint8x16GreaterThan)        \ | 202   V(ArmUint8x16GreaterThan)        \ | 
| 203   V(ArmUint8x16GreaterThanOrEqual) \ | 203   V(ArmUint8x16GreaterThanOrEqual) \ | 
| 204   V(ArmSimd128And)                 \ | 204   V(ArmSimd128And)                 \ | 
| 205   V(ArmSimd128Or)                  \ | 205   V(ArmSimd128Or)                  \ | 
| 206   V(ArmSimd128Xor)                 \ | 206   V(ArmSimd128Xor)                 \ | 
| 207   V(ArmSimd128Not)                 \ | 207   V(ArmSimd128Not)                 \ | 
| 208   V(ArmSimd32x4Select)             \ | 208   V(ArmSimd128Select)              \ | 
| 209   V(ArmSimd16x8Select)             \ | 209   V(ArmSimd1x4AnyTrue)             \ | 
| 210   V(ArmSimd8x16Select) | 210   V(ArmSimd1x4AllTrue)             \ | 
|  | 211   V(ArmSimd1x8AnyTrue)             \ | 
|  | 212   V(ArmSimd1x8AllTrue)             \ | 
|  | 213   V(ArmSimd1x16AnyTrue)            \ | 
|  | 214   V(ArmSimd1x16AllTrue) | 
| 211 | 215 | 
| 212 // Addressing modes represent the "shape" of inputs to an instruction. | 216 // Addressing modes represent the "shape" of inputs to an instruction. | 
| 213 // Many instructions support multiple addressing modes. Addressing modes | 217 // Many instructions support multiple addressing modes. Addressing modes | 
| 214 // are encoded into the InstructionCode of the instruction and tell the | 218 // are encoded into the InstructionCode of the instruction and tell the | 
| 215 // code generator after register allocation which assembler method to call. | 219 // code generator after register allocation which assembler method to call. | 
| 216 #define TARGET_ADDRESSING_MODE_LIST(V)  \ | 220 #define TARGET_ADDRESSING_MODE_LIST(V)  \ | 
| 217   V(Offset_RI)        /* [%r0 + K] */   \ | 221   V(Offset_RI)        /* [%r0 + K] */   \ | 
| 218   V(Offset_RR)        /* [%r0 + %r1] */ \ | 222   V(Offset_RR)        /* [%r0 + %r1] */ \ | 
| 219   V(Operand2_I)       /* K */           \ | 223   V(Operand2_I)       /* K */           \ | 
| 220   V(Operand2_R)       /* %r0 */         \ | 224   V(Operand2_R)       /* %r0 */         \ | 
| 221   V(Operand2_R_ASR_I) /* %r0 ASR K */   \ | 225   V(Operand2_R_ASR_I) /* %r0 ASR K */   \ | 
| 222   V(Operand2_R_LSL_I) /* %r0 LSL K */   \ | 226   V(Operand2_R_LSL_I) /* %r0 LSL K */   \ | 
| 223   V(Operand2_R_LSR_I) /* %r0 LSR K */   \ | 227   V(Operand2_R_LSR_I) /* %r0 LSR K */   \ | 
| 224   V(Operand2_R_ROR_I) /* %r0 ROR K */   \ | 228   V(Operand2_R_ROR_I) /* %r0 ROR K */   \ | 
| 225   V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 229   V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 
| 226   V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 230   V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 
| 227   V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 231   V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 
| 228   V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 232   V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 
| 229 | 233 | 
| 230 }  // namespace compiler | 234 }  // namespace compiler | 
| 231 }  // namespace internal | 235 }  // namespace internal | 
| 232 }  // namespace v8 | 236 }  // namespace v8 | 
| 233 | 237 | 
| 234 #endif  // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 238 #endif  // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 
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