[V8] Implement SIMD Boolean vector types to allow mask registers.

src/wasm/wasm-opcodes.h

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_WASM_OPCODES_H_
 #define V8_WASM_OPCODES_H_
 
 #include "src/globals.h"
 #include "src/machine-type.h"
 #include "src/runtime/runtime.h"
 #include "src/signature.h"
 
 namespace v8 {
 namespace internal {
 namespace wasm {
 
 // Binary encoding of local types.
 enum ValueTypeCode {
   kLocalVoid = 0x40,
   kLocalI32 = 0x7f,
   kLocalI64 = 0x7e,
   kLocalF32 = 0x7d,
   kLocalF64 = 0x7c,
-  kLocalS128 = 0x7b
+  kLocalS128 = 0x7b,
+  kLocalS1x4 = 0x7a,
+  kLocalS1x8 = 0x79,
+  kLocalS1x16 = 0x78
 };
 
 // Type code for multi-value block types.
 static const uint8_t kMultivalBlock = 0x41;
 
 // We reuse the internal machine type to represent WebAssembly types.
 // A typedef improves readability without adding a whole new type system.
 typedef MachineRepresentation ValueType;
 const ValueType kWasmStmt = MachineRepresentation::kNone;
 const ValueType kWasmI32 = MachineRepresentation::kWord32;
 const ValueType kWasmI64 = MachineRepresentation::kWord64;
 const ValueType kWasmF32 = MachineRepresentation::kFloat32;
 const ValueType kWasmF64 = MachineRepresentation::kFloat64;
 const ValueType kWasmS128 = MachineRepresentation::kSimd128;
+const ValueType kWasmS1x4 = MachineRepresentation::kSimd1x4;
+const ValueType kWasmS1x8 = MachineRepresentation::kSimd1x8;
+const ValueType kWasmS1x16 = MachineRepresentation::kSimd1x16;
 const ValueType kWasmVar = MachineRepresentation::kTagged;
 
 typedef Signature<ValueType> FunctionSig;
 std::ostream& operator<<(std::ostream& os, const FunctionSig& function);
 
 typedef Vector<const char> WasmName;
 
 typedef int WasmCodePosition;
 const WasmCodePosition kNoCodePosition = -1;
 
@@ skipping 232 matching lines @@
   V(F32x4RecipApprox, 0xe506, s_s)       \
   V(F32x4SqrtApprox, 0xe507, s_s)        \
   V(F32x4Add, 0xe508, s_ss)              \
   V(F32x4Sub, 0xe509, s_ss)              \
   V(F32x4Mul, 0xe50a, s_ss)              \
   V(F32x4Div, 0xe50b, s_ss)              \
   V(F32x4Min, 0xe50c, s_ss)              \
   V(F32x4Max, 0xe50d, s_ss)              \
   V(F32x4MinNum, 0xe50e, s_ss)           \
   V(F32x4MaxNum, 0xe50f, s_ss)           \
-  V(F32x4Eq, 0xe510, s_ss)               \
-  V(F32x4Ne, 0xe511, s_ss)               \
-  V(F32x4Lt, 0xe512, s_ss)               \
-  V(F32x4Le, 0xe513, s_ss)               \
-  V(F32x4Gt, 0xe514, s_ss)               \
-  V(F32x4Ge, 0xe515, s_ss)               \
+  V(F32x4Eq, 0xe510, s1x4_ss)            \
+  V(F32x4Ne, 0xe511, s1x4_ss)            \
+  V(F32x4Lt, 0xe512, s1x4_ss)            \
+  V(F32x4Le, 0xe513, s1x4_ss)            \
+  V(F32x4Gt, 0xe514, s1x4_ss)            \
+  V(F32x4Ge, 0xe515, s1x4_ss)            \
   V(F32x4SConvertI32x4, 0xe519, s_s)     \
   V(F32x4UConvertI32x4, 0xe51a, s_s)     \
   V(I32x4Splat, 0xe51b, s_i)             \
   V(I32x4Neg, 0xe51e, s_s)               \
   V(I32x4Add, 0xe51f, s_ss)              \
   V(I32x4Sub, 0xe520, s_ss)              \
   V(I32x4Mul, 0xe521, s_ss)              \
   V(I32x4MinS, 0xe522, s_ss)             \
   V(I32x4MaxS, 0xe523, s_ss)             \
-  V(I32x4Eq, 0xe526, s_ss)               \
-  V(I32x4Ne, 0xe527, s_ss)               \
-  V(I32x4LtS, 0xe528, s_ss)              \
-  V(I32x4LeS, 0xe529, s_ss)              \
-  V(I32x4GtS, 0xe52a, s_ss)              \
-  V(I32x4GeS, 0xe52b, s_ss)              \
+  V(I32x4Eq, 0xe526, s1x4_ss)            \
+  V(I32x4Ne, 0xe527, s1x4_ss)            \
+  V(I32x4LtS, 0xe528, s1x4_ss)           \
+  V(I32x4LeS, 0xe529, s1x4_ss)           \
+  V(I32x4GtS, 0xe52a, s1x4_ss)           \
+  V(I32x4GeS, 0xe52b, s1x4_ss)           \
   V(I32x4SConvertF32x4, 0xe52f, s_s)     \
   V(I32x4MinU, 0xe530, s_ss)             \
   V(I32x4MaxU, 0xe531, s_ss)             \
-  V(I32x4LtU, 0xe533, s_ss)              \
-  V(I32x4LeU, 0xe534, s_ss)              \
-  V(I32x4GtU, 0xe535, s_ss)              \
-  V(I32x4GeU, 0xe536, s_ss)              \
+  V(I32x4LtU, 0xe533, s1x4_ss)           \
+  V(I32x4LeU, 0xe534, s1x4_ss)           \
+  V(I32x4GtU, 0xe535, s1x4_ss)           \
+  V(I32x4GeU, 0xe536, s1x4_ss)           \
   V(I32x4UConvertF32x4, 0xe537, s_s)     \
   V(I16x8Splat, 0xe538, s_i)             \
   V(I16x8Neg, 0xe53b, s_s)               \
   V(I16x8Add, 0xe53c, s_ss)              \
   V(I16x8AddSaturateS, 0xe53d, s_ss)     \
   V(I16x8Sub, 0xe53e, s_ss)              \
   V(I16x8SubSaturateS, 0xe53f, s_ss)     \
   V(I16x8Mul, 0xe540, s_ss)              \
   V(I16x8MinS, 0xe541, s_ss)             \
   V(I16x8MaxS, 0xe542, s_ss)             \
-  V(I16x8Eq, 0xe545, s_ss)               \
-  V(I16x8Ne, 0xe546, s_ss)               \
-  V(I16x8LtS, 0xe547, s_ss)              \
-  V(I16x8LeS, 0xe548, s_ss)              \
-  V(I16x8GtS, 0xe549, s_ss)              \
-  V(I16x8GeS, 0xe54a, s_ss)              \
+  V(I16x8Eq, 0xe545, s1x8_ss)            \
+  V(I16x8Ne, 0xe546, s1x8_ss)            \
+  V(I16x8LtS, 0xe547, s1x8_ss)           \
+  V(I16x8LeS, 0xe548, s1x8_ss)           \
+  V(I16x8GtS, 0xe549, s1x8_ss)           \
+  V(I16x8GeS, 0xe54a, s1x8_ss)           \
   V(I16x8AddSaturateU, 0xe54e, s_ss)     \
   V(I16x8SubSaturateU, 0xe54f, s_ss)     \
   V(I16x8MinU, 0xe550, s_ss)             \
   V(I16x8MaxU, 0xe551, s_ss)             \
-  V(I16x8LtU, 0xe553, s_ss)              \
-  V(I16x8LeU, 0xe554, s_ss)              \
-  V(I16x8GtU, 0xe555, s_ss)              \
-  V(I16x8GeU, 0xe556, s_ss)              \
+  V(I16x8LtU, 0xe553, s1x8_ss)           \
+  V(I16x8LeU, 0xe554, s1x8_ss)           \
+  V(I16x8GtU, 0xe555, s1x8_ss)           \
+  V(I16x8GeU, 0xe556, s1x8_ss)           \
   V(I8x16Splat, 0xe557, s_i)             \
   V(I8x16Neg, 0xe55a, s_s)               \
   V(I8x16Add, 0xe55b, s_ss)              \
   V(I8x16AddSaturateS, 0xe55c, s_ss)     \
   V(I8x16Sub, 0xe55d, s_ss)              \
   V(I8x16SubSaturateS, 0xe55e, s_ss)     \
   V(I8x16Mul, 0xe55f, s_ss)              \
   V(I8x16MinS, 0xe560, s_ss)             \
   V(I8x16MaxS, 0xe561, s_ss)             \
-  V(I8x16Eq, 0xe564, s_ss)               \
-  V(I8x16Ne, 0xe565, s_ss)               \
-  V(I8x16LtS, 0xe566, s_ss)              \
-  V(I8x16LeS, 0xe567, s_ss)              \
-  V(I8x16GtS, 0xe568, s_ss)              \
-  V(I8x16GeS, 0xe569, s_ss)              \
+  V(I8x16Eq, 0xe564, s1x16_ss)           \
+  V(I8x16Ne, 0xe565, s1x16_ss)           \
+  V(I8x16LtS, 0xe566, s1x16_ss)          \
+  V(I8x16LeS, 0xe567, s1x16_ss)          \
+  V(I8x16GtS, 0xe568, s1x16_ss)          \
+  V(I8x16GeS, 0xe569, s1x16_ss)          \
   V(I8x16AddSaturateU, 0xe56d, s_ss)     \
   V(I8x16SubSaturateU, 0xe56e, s_ss)     \
   V(I8x16MinU, 0xe56f, s_ss)             \
   V(I8x16MaxU, 0xe570, s_ss)             \
-  V(I8x16LtU, 0xe572, s_ss)              \
-  V(I8x16LeU, 0xe573, s_ss)              \
-  V(I8x16GtU, 0xe574, s_ss)              \
-  V(I8x16GeU, 0xe575, s_ss)              \
+  V(I8x16LtU, 0xe572, s1x16_ss)          \
+  V(I8x16LeU, 0xe573, s1x16_ss)          \
+  V(I8x16GtU, 0xe574, s1x16_ss)          \
+  V(I8x16GeU, 0xe575, s1x16_ss)          \
   V(S128And, 0xe576, s_ss)               \
   V(S128Or, 0xe577, s_ss)                \
   V(S128Xor, 0xe578, s_ss)               \
   V(S128Not, 0xe579, s_s)                \
-  V(S32x4Select, 0xe52c, s_sss)          \
+  V(S32x4Select, 0xe52c, s_s1x4ss)       \
   V(S32x4Swizzle, 0xe52d, s_s)           \
   V(S32x4Shuffle, 0xe52e, s_ss)          \
-  V(S16x8Select, 0xe54b, s_sss)          \
+  V(S16x8Select, 0xe54b, s_s1x8ss)       \
   V(S16x8Swizzle, 0xe54c, s_s)           \
   V(S16x8Shuffle, 0xe54d, s_ss)          \
-  V(S8x16Select, 0xe56a, s_sss)          \
+  V(S8x16Select, 0xe56a, s_s1x16ss)      \
   V(S8x16Swizzle, 0xe56b, s_s)           \
   V(S8x16Shuffle, 0xe56c, s_ss)
 
 #define FOREACH_SIMD_1_OPERAND_OPCODE(V) \
   V(F32x4ExtractLane, 0xe501, _)         \
   V(F32x4ReplaceLane, 0xe502, _)         \
   V(I32x4ExtractLane, 0xe51c, _)         \
   V(I32x4ReplaceLane, 0xe51d, _)         \
   V(I32x4Shl, 0xe524, _)                 \
   V(I32x4ShrS, 0xe525, _)                \
@@ skipping 83 matching lines @@
   V(f_l, kWasmF32, kWasmI64)            \
   V(d_dd, kWasmF64, kWasmF64, kWasmF64) \
   V(d_d, kWasmF64, kWasmF64)            \
   V(d_f, kWasmF64, kWasmF32)            \
   V(d_i, kWasmF64, kWasmI32)            \
   V(d_l, kWasmF64, kWasmI64)            \
   V(d_id, kWasmF64, kWasmI32, kWasmF64) \
   V(f_if, kWasmF32, kWasmI32, kWasmF32) \
   V(l_il, kWasmI64, kWasmI32, kWasmI64)
 
-#define FOREACH_SIMD_SIGNATURE(V)                      \
-  V(s_s, kWasmS128, kWasmS128)                         \
-  V(s_f, kWasmS128, kWasmF32)                          \
-  V(s_ss, kWasmS128, kWasmS128, kWasmS128)             \
-  V(s_sss, kWasmS128, kWasmS128, kWasmS128, kWasmS128) \
-  V(s_i, kWasmS128, kWasmI32)                          \
-  V(s_si, kWasmS128, kWasmS128, kWasmI32)
+#define FOREACH_SIMD_SIGNATURE(V)                         \
+  V(s_s, kWasmS128, kWasmS128)                            \
+  V(s_f, kWasmS128, kWasmF32)                             \
+  V(s_ss, kWasmS128, kWasmS128, kWasmS128)                \
+  V(s1x4_ss, kWasmS1x4, kWasmS128, kWasmS128)             \
+  V(s1x8_ss, kWasmS1x8, kWasmS128, kWasmS128)             \
+  V(s1x16_ss, kWasmS1x16, kWasmS128, kWasmS128)           \
+  V(s_i, kWasmS128, kWasmI32)                             \
+  V(s_si, kWasmS128, kWasmS128, kWasmI32)                 \
+  V(i_s, kWasmI32, kWasmS128)                             \
+  V(s_s1x4ss, kWasmS128, kWasmS1x4, kWasmS128, kWasmS128) \
+  V(s_s1x8ss, kWasmS128, kWasmS1x8, kWasmS128, kWasmS128) \
+  V(s_s1x16ss, kWasmS128, kWasmS1x16, kWasmS128, kWasmS128)
 
 #define FOREACH_PREFIX(V) \
   V(Simd, 0xe5)           \
   V(Atomic, 0xe6)
 
 enum WasmOpcode {
 // Declare expression opcodes.
 #define DECLARE_NAMED_ENUM(name, opcode, sig) kExpr##name = opcode,
   FOREACH_OPCODE(DECLARE_NAMED_ENUM)
 #undef DECLARE_NAMED_ENUM
@@ skipping 43 matching lines @@
       case kWasmI32:
         return kLocalI32;
       case kWasmI64:
         return kLocalI64;
       case kWasmF32:
         return kLocalF32;
       case kWasmF64:
         return kLocalF64;
       case kWasmS128:
         return kLocalS128;
+      case kWasmS1x4:
+        return kLocalS1x4;
+      case kWasmS1x8:
+        return kLocalS1x8;
+      case kWasmS1x16:
+        return kLocalS1x16;
       case kWasmStmt:
         return kLocalVoid;
       default:
         UNREACHABLE();
         return kLocalVoid;
     }
   }
 
   static MachineType MachineTypeFor(ValueType type) {
     switch (type) {
       case kWasmI32:
         return MachineType::Int32();
       case kWasmI64:
         return MachineType::Int64();
       case kWasmF32:
         return MachineType::Float32();
       case kWasmF64:
         return MachineType::Float64();
       case kWasmS128:
         return MachineType::Simd128();
+      case kWasmS1x4:
+        return MachineType::Simd1x4();
+      case kWasmS1x8:
+        return MachineType::Simd1x8();
+      case kWasmS1x16:
+        return MachineType::Simd1x16();
       case kWasmStmt:
         return MachineType::None();
       default:
         UNREACHABLE();
         return MachineType::None();
     }
   }
 
   static ValueType ValueTypeFor(MachineType type) {
     if (type == MachineType::Int8()) {
@@ skipping 11 matching lines @@
     } else if (type == MachineType::Int64()) {
       return kWasmI64;
     } else if (type == MachineType::Uint64()) {
       return kWasmI64;
     } else if (type == MachineType::Float32()) {
       return kWasmF32;
     } else if (type == MachineType::Float64()) {
       return kWasmF64;
     } else if (type == MachineType::Simd128()) {
       return kWasmS128;
+    } else if (type == MachineType::Simd1x4()) {
+      return kWasmS1x4;
+    } else if (type == MachineType::Simd1x8()) {
+      return kWasmS1x8;
+    } else if (type == MachineType::Simd1x16()) {
+      return kWasmS1x16;
     } else {
       UNREACHABLE();
       return kWasmI32;
     }
   }
 
   static WasmOpcode LoadStoreOpcodeOf(MachineType type, bool store) {
     if (type == MachineType::Int8()) {
       return store ? kExprI32StoreMem8 : kExprI32LoadMem8S;
     } else if (type == MachineType::Uint8()) {
@@ skipping 24 matching lines @@
     switch (type) {
       case kWasmI32:
         return 'i';
       case kWasmI64:
         return 'l';
       case kWasmF32:
         return 'f';
       case kWasmF64:
         return 'd';
       case kWasmS128:
+      case kWasmS1x4:
+      case kWasmS1x8:
+      case kWasmS1x16:
         return 's';
       case kWasmStmt:
         return 'v';
       case kWasmVar:
         return '*';
       default:
         return '?';
     }
   }
 
   static const char* TypeName(ValueType type) {
     switch (type) {
       case kWasmI32:
         return "i32";
       case kWasmI64:
         return "i64";
       case kWasmF32:
         return "f32";
       case kWasmF64:
         return "f64";
       case kWasmS128:
         return "s128";
+      case kWasmS1x4:
+        return "s1x4";
+      case kWasmS1x8:
+        return "s1x8";
+      case kWasmS1x16:
+        return "s1x16";
       case kWasmStmt:
         return "<stmt>";
       case kWasmVar:
         return "<var>";
       default:
         return "<unknown>";
     }
   }
 };
 }  // namespace wasm
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_WASM_OPCODES_H_