[V8] Implement SIMD Boolean vector types to allow mask registers.

src/ppc/assembler-ppc.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 188 matching lines @@
 #undef DECLARE_REGISTER
 const Register no_reg = {Register::kCode_no_reg};
 
 // Aliases
 const Register kLithiumScratch = r11;        // lithium scratch.
 const Register kConstantPoolRegister = r28;  // Constant pool.
 const Register kRootRegister = r29;          // Roots array pointer.
 const Register cp = r30;                     // JavaScript context pointer.
 
 static const bool kSimpleFPAliasing = true;
+static const bool kSimdMaskRegisters = false;
 
 // Double word FP register.
 struct DoubleRegister {
   enum Code {
 #define REGISTER_CODE(R) kCode_##R,
     DOUBLE_REGISTERS(REGISTER_CODE)
 #undef REGISTER_CODE
         kAfterLast,
     kCode_no_reg = -1
   };
@@ skipping 1264 matching lines @@
 
 
 class EnsureSpace BASE_EMBEDDED {
  public:
   explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); }
 };
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_PPC_ASSEMBLER_PPC_H_